Embedded Interposer Packaging Carrier for Thinner Chip Packages
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Solution Overview
Problem
Current chip packaging methods fail to achieve a thinner package thickness while maintaining effective heat dissipation and contact distribution, leading to limitations in device compactness and efficiency.
Innovation Solution
A packaging carrier structure comprising a dielectric layer, an interposer with exposed pads, and a built-up structure, where the interposer is embedded in the dielectric layer and connected via conductive vias, allowing for a thinner profile and increased pad density through the use of materials like silicon, glass, or ceramic, and an adhesive layer that serves as a passivation and solder resist layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional chip packaging methods are used with wire bonding or flip chip bonding, then contact distribution can be rearranged through packaging carrier, but package thickness cannot be reduced
Solution Approach 1:
The patent transitions from planar contact distribution to three-dimensional contact distribution by stacking multiple interposer layers with different pad layouts. The first interposer has first pads on its first surface, the second interposer has second pads on its second surface, and conductive vias connect these pads vertically through the dielectric layer, creating a vertical dimension for contact redistribution that reduces package thickness while maintaining effective contact distribution.
Solution Approach 2:
The patent embeds the first interposer within the dielectric layer, and then embeds the second interposer within the same dielectric layer at a different vertical position. This nested arrangement allows multiple functional layers to occupy overlapping horizontal space at different vertical levels, reducing the overall package thickness while preserving all necessary contact distribution functions.
2Length of moving object
If package thickness is reduced, then device compactness is improved, but heat dissipation capability may deteriorate
Solution Approach 1:
The patent applies different material properties to different regions of the packaging structure. The dielectric layer is configured with specific thermal conductivity characteristics in the vertical direction to facilitate heat dissipation, while the interposer layers provide both electrical connection and thermal pathways. This localized optimization of material properties ensures that heat dissipation is maintained even as overall package thickness is reduced.
3Quantity of substance
If more contacts are distributed through packaging carrier, then contact density is reduced, but device complexity increases
Solution Approach 1:
The patent divides the contact distribution function into multiple segments: the first interposer handles first pads, the second interposer handles second pads, and conductive vias provide vertical connections. This segmentation allows each layer to be optimized independently for its specific contact distribution requirements, reducing overall complexity compared to a single monolithic interposer structure that would need to handle all contacts.
Data Source
AI summary
A packaging carrier includes an interposer, a dielectric layer and a built-up structure. The interposer has a first surface and a second surface opposite to each other, and a plurality of first pads and second pads located on the first surface and the second surface, respectively. The dielectric layer has a third surface and a fourth surface opposite to each other. The interposer is embedded in the dielectric layer. The second surface of the interposer is not covered by the fourth surface of the dielectric layer, and has a height difference with the fourth surface. The built-up structure is disposed on the third surface of the dielectric layer and electrically connected to the first pads of the interposer.


