Embedded Interposer Through-Hole Vias Routing Density

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Solution Overview

Problem

High-speed applications require higher-density package substrates with narrower trace widths, which are costly and may experience power inefficiencies due to longer interconnect paths in 2.5D IC packages, and silicon bridge structures lack direct power connections, leading to voltage drops and routing congestion.

Innovation Solution

An integrated circuit package with an embedded interposer structure that forms direct connections with metal layers in the package substrate, allowing for higher routing density and direct power delivery through through-hole vias, reducing the need for extensive interconnect paths and improving power efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a 2.5D IC package with through silicon vias (TSVs) is used to transmit signals from IC dies to the package substrate, then signal transmission is enabled, but the interposer structure becomes relatively large in size and costly

Engineering Contradiction:
Improvesignal transmissionVSAvoidinterposer structure size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from a conventional 2.5D IC package with a large interposer to a 3D integrated structure where the interposer is embedded within the package substrate. This dimensional integration reduces the overall footprint and eliminates the need for a separate large interposer structure, while maintaining signal transmission functionality through vertically stacked vias and conductive paths.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If a high-density package substrate with narrower trace widths is used to support high-speed applications, then routing density is improved, but manufacturing cost increases

Engineering Contradiction:
Improverouting densityVSAvoidmanufacturing cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent segments the routing function between the package substrate and the embedded interposer. The interposer provides high-density routing for critical high-speed signals through its embedded location and direct via connections, while the package substrate handles less demanding routing. This segmentation allows the expensive high-density routing to be concentrated only where needed, reducing overall manufacturing cost.

Inventive Principle:
Principle #1Segmentation

3Area of stationary object

If a silicon bridge structure is used to provide chip-to-chip connections, then size is reduced and cost is lowered, but direct power connections are eliminated causing voltage drops

Engineering Contradiction:
Improvebridge structure sizeVSAvoidvoltage drop
Core Design Contradiction:
Area of stationary objectVSLoss of energy

Solution Approach 1:

The embedded interposer serves multiple functions simultaneously: it provides high-density signal routing, enables direct power connections through vertically stacked vias to IC dies, and maintains a compact form factor. This multi-functionality eliminates the voltage drop issue while preserving the size benefits, as the interposer is integrated within the substrate rather than adding external bulk.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Reliability

If power connections are routed from the center of IC dies to other parts of the package substrate away from the silicon bridge, then connections are established, but routing congestion occurs

Engineering Contradiction:
Improvepower connectionVSAvoidrouting congestion
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent resolves routing congestion by moving power connections into the vertical dimension through the embedded interposer. Power vias are stacked vertically through the interposer to reach IC dies directly, eliminating the need for lengthy horizontal routing paths across the package substrate. This vertical integration significantly reduces routing congestion and simplifies the overall device structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9418965B1Embedded interposer with through-hole vias
Publication Date: 2016.08.16 TAHOE RES LTD
  • US9418965B1 patent drawing
  • US9418965B1 patent drawing
  • US9418965B1 patent drawing

AI summary

A method of forming an integrated circuit package may include forming a first layer of a package substrate and mounting an interposer structure on the first layer of a substrate. In some instances, adhesive is used to attach the interposer structure to the first layer of the substrate. After the interposer structure is mounted on the first layer of the substrate, at least one hole is formed through the interposer structure. The hole may be filled with a conductive material such as copper to form a through-hole via in the interposer structure. A second layer of the substrate may be formed over the interposer structure and the first layer of the substrate. Integrated circuit (IC) dies may be mounted on the substrate and signals may be routed between the IC dies via the interposer structure embedded in the substrate.