Core-Embedded IPD Shielding for Dense Chip Package Vias

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Solution Overview

Problem

Conventional chip packaging schemes face limitations in via density due to the need to maintain distance between vias coupled to inductors to avoid noise and parasitic effects, which restricts the routing density and performance of electronic devices.

Innovation Solution

Embedding integrated passive devices, such as capacitors, in the core of the substrate to shield vias coupled to inductors, reducing the required keep-out space and allowing closer proximity of vias, thereby increasing substrate via density and improving device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If vias are placed closer together to increase via density, then substrate via density improves, but noise and parasitic effects increase due to proximity to inductor-coupled vias

Engineering Contradiction:
Improvevia densityVSAvoidnoise and parasitic effects
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

An integrated passive device (IPD), typically a capacitor, is embedded in the substrate core between inductor-coupled vias and other vias. This IPD acts as an intermediary shielding element that blocks electromagnetic noise and parasitic effects from propagating between the vias, allowing them to be placed closer together while maintaining signal integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The IPD is embedded within the substrate core structure, nesting the shielding function inside the existing substrate architecture. This allows the shield to be integrated without adding external bulk, enabling closer via placement while maintaining compact form factor.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If keep-out space around inductor-coupled vias is reduced, then routing density improves, but signal integrity degrades due to increased noise coupling

Engineering Contradiction:
Improverouting densityVSAvoidsignal integrity
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The IPD serves as a shielding intermediary positioned between inductor-coupled vias and adjacent signal paths. This allows routing to be placed closer to inductors while the IPD blocks harmful electromagnetic coupling, maintaining signal integrity despite reduced spacing.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If distance between vias is increased to reduce noise, then signal integrity improves, but via density decreases limiting routing capability

Engineering Contradiction:
Improvesignal integrityVSAvoidvia density
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

By inserting an IPD as a shielding intermediary between vias, the patent enables closer via placement while maintaining signal integrity. The IPD blocks noise propagation, effectively replacing the need for large physical spacing with an active shielding mechanism.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Instead of solving the noise problem by increasing horizontal spacing between vias, the patent introduces shielding in the vertical dimension by embedding IPDs within the substrate core. This multi-dimensional approach allows dense via placement while maintaining signal integrity through vertical shielding layers.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The embedded passive devices effectively shield noise between adjacent conductors, enabling higher via density, enhancing signal integrity, and improving power routing while maintaining high performance without degrading signal quality.

Implementation Method 1

integrated passive devices embedded in a core of a substrate of the chip package, such as a package substrate or an interposer, that shield routings coupled to inductors from adjacent through-substrate conductive paths

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Data Source

PatentUS12482715B2Chip package with core embedded integrated passive device
Publication Date: 2025.11.25 XILINX INC
  • US12482715B2 patent drawing
  • US12482715B2 patent drawing
  • US12482715B2 patent drawing

AI summary

Chip packages are described herein that includes integrated passive devices embedded in a core of a substrate of the chip package, such as a package substrate or an interposer, that shield routings coupled to inductors from adjacent through-substrate conductive paths (e.g., vias). In one example, a chip package includes an integrated circuit (IC) die mounted to a substrate. A core of the substrate has a plurality of inductor routing vias, a plurality of signal transmission vias, and a plurality of ground and power routing vias. A first integrated passive device (IPD) is disposed in the core and separates at least one of the plurality of inductor routing vias from an adjacent via, the adjacent via being one of the plurality of signal transmission vias or one of the plurality of ground and power routing vias.