3D Substrate-Embedded IPD Structure for PCB Space Constraints

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Solution Overview

Problem

The increasing miniaturization of semiconductor devices and packaging structures has led to a reduction in surface area available for mounting electrical components like capacitors and other integrated passive devices (IPDs) on printed circuit boards (PCBs), making component mounting increasingly difficult.

Innovation Solution

The integration of substrate-embedded integrated passive devices (IPDs), such as deep trench capacitors (DTCs), within the dielectric layers of semiconductor dies, allowing for the relocation of electrical components from surface areas to internal areas, thereby freeing up surface space for other components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If successive reductions in minimum feature size are implemented to increase integration density, then more components can be integrated into a given area, but the surface area available for mounting electrical components decreases

Engineering Contradiction:
Improveintegration densityVSAvoidsurface area for mounting components
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent transitions from two-dimensional surface mounting to three-dimensional embedding by forming capacitors within the substrate thickness direction. Trenches are etched into the substrate and filled with capacitor structures, utilizing the vertical dimension to create IPDs that do not occupy additional surface area, thereby resolving the contradiction between integration density and available mounting surface.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If three-dimensional device structures with stacked chips are implemented, then integration density and bandwidth are improved, but the surface area occupied by packaging structures increases

Engineering Contradiction:
Improveintegration densityVSAvoidsurface area for packaging
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent merges the capacitor structures with the substrate itself by forming trenches directly in the substrate and filling them with capacitor dielectric and electrodes. This integration eliminates the need for separate surface-mounted capacitor components and their associated packaging structures, thereby maintaining high integration density while reducing the surface area occupied by packaging.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If electrical components are mounted on the surface of PCBs, then component functionality is achieved, but space utilization efficiency decreases due to reduced surface area

Engineering Contradiction:
Improvecomponent functionalityVSAvoidsurface area utilization
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts capacitors from the surface mounting domain and relocates them into the substrate interior. By forming trenches within the substrate and filling them with capacitor structures, the design removes the need for surface-mounted capacitors, thereby freeing up surface area while maintaining all necessary electrical component functionalities.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12272724B2Three-dimensional device structure including substrate-embedded integrated passive device and methods for making the same
Publication Date: 2025.04.08 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12272724B2 patent drawing
  • US12272724B2 patent drawing
  • US12272724B2 patent drawing

AI summary

A three-dimensional device structure includes a die including a semiconductor substrate, an interconnect structure disposed on the semiconductor substrate, a through silicon via (TSV) structure that extends through the semiconductor substrate and electrically contacts a metal feature of the interconnect structure, and an integrated passive device (IPD) embedded in the semiconductor substrate and electrically connected to the TSV structure.