Embedded IVR Package Structure for Shorter Power Transmission Paths

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Solution Overview

Problem

Existing semiconductor packages face challenges in achieving miniaturization, high electrical performance, and low power consumption due to limited space for integrated voltage regulators (IVRs), leading to increased manufacturing costs and redesign requirements.

Innovation Solution

An electronic structure with conductive vias and conductors on opposite sides, encapsulated by insulating layers, embedded in an encapsulating layer with conductive pillars, allowing for close integration with electronic components without redesigning the package.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If IVR is integrated to the lower side of the package substrate, then transmission distance is shortened and surface area is reduced, but there is not enough room for more IVRs when more semiconductor chips are attached

Engineering Contradiction:
Improvetransmission distanceVSAvoidcapacity for additional IVRs
Core Design Contradiction:
Length of moving objectVSAdaptability or versatility

Solution Approach 1:

The patent transitions from planar integration of IVRs on the package substrate to three-dimensional integration by embedding IVR structures within the encapsulant layer. This vertical stacking approach allows multiple IVRs to be positioned at different depths and locations, effectively increasing the capacity for IVR integration without expanding the footprint on the package substrate surface.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If IVR is integrated to the lower side of the package substrate, then surface area and volume of the circuit board are reduced, but it becomes difficult to satisfy demands for light, thin and compact end products with low power consumption and high electrical performance simultaneously

Engineering Contradiction:
Improvesurface area of circuit boardVSAvoidelectrical performance
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent embeds IVR structures within the encapsulant layer, creating a nested configuration where the IVR is contained within the existing package structure. This nesting approach reduces the overall footprint and eliminates the need for separate IVR mounting areas on the circuit board, achieving miniaturization while maintaining electrical performance through optimized signal paths.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Adaptability or versatility

If semiconductor chips are attached on the package substrate with more functions, then the amount of semiconductor chips and IVRs increases, but there is not enough room on the lower side of the package substrate

Engineering Contradiction:
Improvefunctionality of end productVSAvoidavailable space on package substrate
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent utilizes the third dimension (vertical depth within the encapsulant) to accommodate additional IVR structures, allowing the system to support more semiconductor chips and higher functionality without requiring additional surface area on the package substrate. This enables scaling of system capability while maintaining a compact form factor.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12438079B2Electronic structure
Publication Date: 2025.10.07 SILICONWARE PRECISION IND CO LTD
  • US12438079B2 patent drawing
  • US12438079B2 patent drawing
  • US12438079B2 patent drawing

AI summary

An electronic package is provided, in which an electronic structure used as an integrated voltage regulator and a plurality of conductive pillars are embedded in an encapsulating layer to facilitate electrical transmission with electronic components at a close range.