Embedded Leadframe Package Structure for Board-Level Reliability
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Solution Overview
Problem
Existing semiconductor device packaging configurations face challenges in accommodating sophisticated features and applications, leading to potential issues with reliability, performance, and cost.
Innovation Solution
A semiconductor device with an embedded leadframe is developed, featuring a semiconductor die, a redistribution layer substrate, and a pre-formed leadframe that surrounds the die in a cage-like manner, providing additional strength and flexibility as an electromagnetic interference shield and heat spreader.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional semiconductor device packaging configurations are used, then manufacturing simplicity is maintained, but reliability and performance are compromised when accommodating sophisticated features
Solution Approach 1:
The patent merges the leadframe and package substrate into a single integrated structure where the leadframe serves dual functions as both mechanical support and electrical interconnection. The leads are formed to extend through the substrate, combining structural and electrical functions that were previously separate components, thereby improving reliability without proportionally increasing complexity.
Solution Approach 2:
The leadframe structure is designed to perform multiple functions simultaneously: providing mechanical support for the semiconductor die, serving as an electrical interconnection network, acting as a shield, and enabling board-level mounting. This multi-functionality addresses sophisticated application requirements without requiring additional separate components.
2Adaptability or versatility
If package configuration is modified to accommodate sophisticated features, then application-specific performance is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The leadframe structure is pre-formed with leads extending through the substrate at predetermined positions and orientations before semiconductor die attachment. This preliminary configuration allows the package to be adapted to sophisticated application requirements while maintaining manufacturing simplicity, as the complex geometry is established in a single fabrication step rather than through multiple assembly operations.
3Strength
If leadframe is embedded in encapsulant, then mechanical strength and bonding are improved, but manufacturing process complexity increases
Solution Approach 1:
The leadframe is embedded within the encapsulant material, with the encapsulant forming a protective matrix around the leads and die pad. This nested configuration provides mechanical strength and secure bonding to the substrate while the encapsulation process integrates seamlessly with existing semiconductor packaging workflows, minimizing the increase in manufacturing process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The embedded leadframe enhances package strength and mechanical bonding, improves board-level reliability, and offers flexibility as an EMI shield and heat spreader, while maintaining performance and reducing costs.
Implementation Method 1
The embedded leadframe may be configured to serve as an electromagnetic interference shield
Implementation Method 2
The embedded leadframe may be configured to serve as an electromagnetic interference shield and/or a heat spreader
Data Source
AI summary
A method of forming a semiconductor device is provided. The method includes forming a redistribution layer (RDL) substrate over an active side of a semiconductor die. The RDL substrate includes a plurality of under-bump metallization (UBM) structures. A die pad of a leadframe is affixed on a backside of the semiconductor die. The leadframe includes a plurality of leads having a first portion of each lead connected to the die pad and a second portion of each lead extending vertically along sidewalls of the semiconductor die toward a plane of the RDL substrate. An encapsulant encapsulates the semiconductor die and the leadframe, a lead tip portion of each lead is exposed through the encapsulant.