Embedded External Loopback Circuit for High-Speed Serial Interface Testing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-speed serial communication interface testing methods fail to cover maximum communication speeds, leading to incomplete testing and potential issues during electrical die sorting and packaging.
Innovation Solution
A serial communication interface circuit with an embedded external loopback circuit that forms a loopback path between output and input ports, allowing for testing through various channel models and test control signals, enabling comprehensive testing of high-speed serial communication interfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional testing methods are used for serial communication interfaces, then testing can be performed with simple setup, but test coverage is insufficient at maximum communication speeds
Solution Approach 1:
The patent embeds the external loopback circuit directly within the serial communication interface circuit itself. The loopback circuit is nested inside the device under test, allowing the output port to connect to the input port through an internal path that includes channel models. This eliminates the need for complex external testing equipment while enabling comprehensive testing at maximum communication speeds through the embedded analog signal path.
Solution Approach 2:
The patent introduces an embedded external loopback circuit as an intermediary element within the serial communication interface. This loopback circuit includes channel models that mediate between the transmitter and receiver, simulating real-world signal transmission conditions. The intermediary loopback path enables thorough testing of the analog signal path without requiring complex external test equipment.
2Reliability
If internal loopback test is used without analog signal path, then testing is simpler, but it cannot cover external signal path issues
Solution Approach 1:
The external loopback circuit is nested within the serial communication interface circuit, incorporating channel models that simulate the external analog signal path. This internal nesting allows the test to cover external signal path issues including transmitter output, input impedance, and receiver input without requiring actual external connections, thus maintaining operational simplicity while improving test completeness.
Solution Approach 2:
The patent creates a copy of the external signal path within the device by implementing channel models in the embedded loopback circuit. These models replicate the characteristics of the external analog signal path, including transmission line effects and impedance matching, allowing comprehensive testing of external path issues without requiring physical external connections.
3Reliability
If testing is performed without embedded external loopback circuit, then device structure is simpler, but high-speed serial communication interface testing is incomplete
Solution Approach 1:
The external loopback circuit is nested within the serial communication interface circuit, with channel models embedded in the signal path between transmitter and receiver. This nested structure enables accurate high-speed serial communication interface testing by including the analog signal path in the test loop, while keeping the overall device structure integrated and compact rather than adding separate external testing components.
Data Source
AI summary
A serial communication interface circuit includes a transmitter configured to convert first parallel data into first serial data and transmit the first serial data through an output port; a receiver configured to receive second serial data through an input port and convert the second serial data into second parallel data; a test controller configured to generate at least one test control signal; and an embedded external loopback circuit configured to form an external loopback path between the output port and the input port to receive the first serial data and output the second serial data according to at least one channel model in response to the at least one test control signal in a test mode.