Embedded Magnetic Carrier Board for Thin Low-Warpage Packaging
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Solution Overview
Problem
Conventional FCBGA package carrier boards face challenges in miniaturization and thinning due to the large size of inductors and board warpage, which affects electrical performance and increases processing costs.
Innovation Solution
A package carrier board with a core layer integrating patterned magnetic conductive metal layers and conductive coil layers, along with conductive connecting elements and rigid support layers, to enhance electrical performance and reduce size, while using a manufacturing method involving electroplating and Semi-additive Process for circuit build-up layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If inductors are directly embedded in the core layer to reduce package thickness, then package thinning is achieved, but the inductor size cannot be sufficiently reduced and electrical performance is limited
Solution Approach 1:
The patent transitions from planar inductor structures to three-dimensional stacked inductor structures. Multiple inductor patterns are formed at different heights within the core layer, utilizing the vertical dimension to achieve higher inductance values in a compact footprint, thereby reducing package thickness while maintaining or improving electrical performance
Solution Approach 2:
The patent implements nested inductor structures where smaller inductor patterns are positioned within or adjacent to larger inductor patterns across multiple layers. This nesting approach maximizes the use of available space within the core layer, allowing multiple inductors to coexist in a compact arrangement that reduces overall package size while achieving required inductance values
2Adaptability or versatility
If FCBGA packages are developed towards large package size with high stacking number to integrate more chips, then functionality is improved, but serious board warpage occurs affecting quality reliability
Solution Approach 1:
The patent divides the large FCBGA package into multiple smaller functional modules or regions. By segmenting the package structure and distributing components across different areas and layers, the overall stress and warpage are reduced while maintaining high chip integration capability through the modular architecture
Solution Approach 2:
The patent applies different structural characteristics to different regions of the FCBGA package. Specific areas may have varied layer configurations, material compositions, or support structures tailored to local requirements, allowing optimization of both chip integration in high-density regions and warpage control in critical areas
3Stability of the object's composition
If the thickness of the core layer is increased to suppress board warping, then board warpage is reduced, but manufacturing precision deteriorates due to difficulty in achieving fine pitch of via holes
Solution Approach 1:
The patent utilizes multi-layer stacking to achieve fine pitch via hole arrangements. Instead of relying solely on increasing core layer thickness, the design employs via holes distributed across multiple thin layers with precise vertical alignment, achieving the required precision through three-dimensional positioning rather than simply increasing single-layer thickness
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables improved electrical performance, reduced size, and minimized board warpage, achieving higher inductance values and better quality factors, suitable for thin and miniaturized designs with lower energy consumption.
Implementation Method 1
The magnetic element structure includes a plurality of patterned magnetic conductive metal layers 221a-221e and a plurality of patterned conductive coil layers 222a-222e
Implementation Method 2
The conductive connecting element is disposed through the core layer and electrically connects the first surface of the core layer and the patterned conductive circuit layer of the second surface
Data Source
AI summary
The invention provides a package carrier board and a manufacturing method thereof. The packaging carrier board includes a core layer, a magnetic element structure and a conductive connecting element. The core layer has a first surface and a second surface opposite to each other. The magnetic element structure includes a plurality of patterned magnetic conductive metal layers and a plurality of patterned conductive coil layers. The patterned magnetic conductive metal layers are stacked and embedded in the core layer, and each have at least one magnetic conductive metal, and part of these magnetic conductive metals form an array block. The patterned conductive coil layers are embedded in the core layer, and part of the patterned conductive coil layers are located on both sides of the array block. The conductive connecting element is arranged through the core layer and conducts the first surface and the second surface of the core layer.