Embedded Memory Cell Sizing for Low-Voltage Video Processing

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Solution Overview

Problem

Image/video processing in mobile devices faces challenges with power consumption and memory failures at low supply voltages, leading to deterioration in image quality due to the high demand for multimedia processing and the limitations of existing memory designs.

Innovation Solution

An embedded memory design for image/video processors that assigns larger memory cells to high-priority data bits, allowing for differential cell sizes to minimize quality degradation during low voltage operations, while reducing power consumption and failure probabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If the supply voltage is decreased to reduce power consumption, then power consumption is reduced, but memory cell failures occur leading to image quality deterioration

Engineering Contradiction:
Improvepower consumptionVSAvoidmemory cell reliability
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

The patent applies local quality by differentiating memory cell sizes based on data importance. Critical data bits (MSBs) are stored in larger memory cells with higher reliability, while less critical bits (LSBs) use smaller cells. This allows the system to operate at lower voltages while maintaining acceptable image quality by protecting only the most important data from voltage-induced failures.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameter of memory cell size to optimize the reliability-power consumption tradeoff. By varying cell size according to data priority, the system achieves lower power consumption compared to uniform large-cell designs, while maintaining sufficient reliability for critical data through appropriately sized cells.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If uniform large memory cells are used to ensure reliability, then memory reliability is improved, but circuit area increases

Engineering Contradiction:
Improvememory cell reliabilityVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Instead of using uniform large memory cells throughout, the patent applies local quality by making memory cells different sizes based on their specific function. Only the memory cells storing critical data bits are made large, while others are smaller, thereby reducing total circuit area while maintaining reliability where it matters most.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the memory cell size parameter from uniform to variable, optimizing the balance between reliability and area. By adjusting cell size according to data priority, the system achieves the minimum necessary reliability without the overhead of making all cells large, thus reducing overall circuit area.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If error correction codes are used to prevent image quality deterioration, then image quality is maintained, but device complexity increases

Engineering Contradiction:
Improveimage qualityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces complex error correction coding with a simpler local quality approach: differentiating memory cell sizes based on data importance. This physical-level differentiation achieves image quality protection without requiring complex ECC logic, thereby reducing device complexity while maintaining reliability.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8675139B2Embedded memory design for low power video processor
Publication Date: 2014.03.18 KOREA UNIV RES & BUSINESS FOUND
  • US8675139B2 patent drawing
  • US8675139B2 patent drawing
  • US8675139B2 patent drawing

AI summary

There is provided an image/video processor comprises an embedded memory for image/video data that including a plurality of unit memory blocks including a plurality of memory cells; and a controller configured to store each bit of image/video data received through an input/output unit in each memory cell, read the image/video data stored in each memory cell of the embedded memory, and output the image/video data through the input/output unit, wherein at least two or more memory cells included in the plurality of memory cells have different sizes, the controller assign each bit of the image/video data depending on the importance of the image/video data and a size of the memory cell, and as the size of the memory cell is larger, a bit of image/video data of high importance is assigned.