Defect Localization in Embedded Memory Using Laser EeLADA
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Solution Overview
Problem
Current methods for defect localization in semiconductor devices, particularly in embedded memory, are time-consuming and resource-intensive, and conventional static failure analysis approaches have a low success rate, especially when isolating bit-cell defects using Electrically-enhanced laser-assisted device alteration (EeLADA), which is limited to a few tens of microns.
Innovation Solution
A system and method utilizing enhanced EeLADA with automated testing equipment (ATE) interfaced with a wafer probe and a diagnostic laser for stimulating a device under test, generating 3D profiles and performing pixel-by-pixel cross-correlation to improve diagnostic resolution at bit-cell level, enabling precise defect localization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional static failure analysis approaches are used for defect localization, then the process is simple to implement, but the success rate is low
Solution Approach 1:
The patent introduces an intermediary laser beam system that mediates between the test equipment and the device under test. The laser beam acts as a tool to locally alter the device structure, enabling dynamic failure analysis that bridges the gap between simple static analysis and complex bitmapping approaches, thereby improving defect localization success rate without requiring full bitmapping complexity
Solution Approach 2:
The patent changes the physical state of the device under test by using laser-induced local heating and melting to alter conductivity and create conductive bridges. This parameter change approach transforms the device structure dynamically during testing, enabling failure analysis that overcomes the limitations of static analysis while avoiding the complexity of bitmapping
2Measurement precision
If bitmapping is used for defect localization in embedded memory, then diagnostic precision is improved, but the process is time consuming and resource consuming
Solution Approach 1:
The patent extracts and focuses only on the critical failing bit-cell region using laser-based local alteration, rather than performing comprehensive bitmapping across the entire memory array. This extraction approach achieves high diagnostic precision at the specific defect location while dramatically reducing the time and resources required compared to full bitmapping procedures
Solution Approach 2:
The patent segments the defect localization process into targeted regions of interest using laser scanning and local alteration, dividing the large memory array into smaller manageable segments for analysis. This segmentation enables precise defect localization without requiring time-consuming exhaustive testing of the entire memory structure
3Adaptability or versatility
If EeLADA is used for bit-cell isolation, then alternative method is provided, but the resolution is limited to a few tens of microns
Solution Approach 1:
The patent introduces dynamic control of the laser beam parameters including wavelength, power, and scanning speed to achieve precise bit-cell level resolution. By dynamically adjusting these parameters, the system overcomes the static resolution limits of conventional EeLADA (tens of microns) and achieves sub-micron precision necessary for modern embedded memory analysis
Solution Approach 2:
The patent adds a new dimension of control by incorporating automated test equipment integration with the laser system, enabling simultaneous electrical testing and optical alteration. This multi-dimensional approach combines electrical signal analysis with optical beam control to achieve resolution beyond the capabilities of traditional EeLADA methods
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves improved diagnostic resolution for bit-cell defects, enhancing the precision of defect isolation and overcoming the limitations of existing methods by providing a more effective and efficient method for identifying defects at a higher resolution.
Implementation Method 1
a diagnostic laser for stimulating a device under test (DUT) with the diagnostic laser at a region of interest (ROI)
Implementation Method 2
Electrically-enhanced laser-assisted device alteration (EeLADA)
Data Source
AI summary
A system and method for defect localization in embedded memory are provided. Embodiments include a system including automated testing equipment (ATE) interfaced with a wafer probe including a diagnostic laser for stimulating a DUT with the diagnostic laser at a ROI. The ATE is configured to simultaneously perform a test run at a test location of the DUT with a test pattern during stimulation of the DUT. Failing compare vectors of a reference failure log of a defective device are stored. A first profile module is configured to generate a first 3D profile from each pixel of a reference image of the defective device. A second profile module is configured to generate a second 3D profile from each pixel of the ROI of the DUT. A cross-correlation module is configured to execute a pixel-by-pixel cross-correlation from the first and second 3D profiles and generate an intensity map corresponding to a level of correlation between the DUT and defective device.