Embedded Metal Pad Structure for Void-Resistant Chip Bonding
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Solution Overview
Problem
Wafer and/or chip bonding in semiconductor devices faces challenges with delamination and void formation due to lateral forces, affecting the electrical properties and performance of semiconductor devices, especially as design rules scale to smaller dimensions.
Innovation Solution
The implementation of embedded metal pads with a lower portion of the side surface embedded in the dielectric material, which enhances bonding and reduces the likelihood of delamination and void formation, thereby improving electrical connections and mechanical stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wafer and/or chip bonding is performed with conventional metal pads, then electrical connections can be established, but delamination and void formation occur due to lateral forces
Solution Approach 1:
The patent transitions from conventional planar metal pads to three-dimensional embedded metal pads that extend vertically into the dielectric material. This dimensional change allows the metal pad to anchor deeper into the substrate, providing mechanical reinforcement that resists lateral forces during bonding while maintaining electrical connectivity. The vertical embedding creates a tapered structure that distributes stress more effectively, preventing delamination and void formation.
2Productivity
If design rules are scaled to smaller dimensions, then device density increases, but lateral forces cause increased delamination and void formation
Solution Approach 1:
The patent applies local quality by creating embedded metal pads with specific geometric characteristics at critical locations. The metal pads are embedded to a controlled depth (e.g., 5-20 micrometers) into the dielectric material, creating a localized reinforcement zone. This localized structural modification provides enhanced mechanical support precisely where bonding forces are applied, without requiring changes to the overall device design or other areas of the substrate.
3Ease of manufacture
If conventional metal pads are used, then processing is simpler, but electrical connections are weaker and more prone to defects
Solution Approach 1:
The patent implements preliminary action by forming the embedded metal pad structure into the dielectric material before depositing subsequent layers and performing bonding operations. The metal pad is embedded during the dielectric formation process, creating a pre-positioned mechanical anchor that will later resist bonding forces. This preliminary structural preparation ensures that when bonding occurs, the electrical connections are already supported by a reinforced pathway, reducing the risk of delamination and void formation.
Data Source
AI summary
Methods, apparatuses, and systems related to embedded metal pads are described. An example semiconductor device includes a dielectric material, a metal pad having side surface, where a lower portion of the side surface is embedded in the dielectric material, a mask material on a portion of a surface of the dielectric material, an upper portion of the side surface of the metal pad, and a portion of a top surface of the metal pad and a contact pillar on a second portion of the top surface of metal pad, the contact pillar comprising a metal pillar and a pillar bump.