Embedded MRAM Bottom Electrode Resistance Reduction
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Solution Overview
Problem
High parasitic series resistance in magnetoresistive random-access memory (MRAM) devices reduces effective tunnel magnetoresistance and degrades read performance, particularly due to the electrical resistance of the bottom metal electrode, which is a significant contributor to the total resistance of the 1T-1R cell.
Innovation Solution
The method involves forming an embedded MRAM device with a bottom metal electrode of increased diameter by depositing an inner metal ring around the bottom electrode, which reduces the electrical resistance without exposing the electrode during the magnetic tunnel junction (MTJ) stack etch, thereby minimizing parasitic series resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the bottom metal electrode diameter is increased to reduce resistance, then parasitic series resistance decreases, but the device structure becomes more complex and manufacturing becomes more difficult
Solution Approach 1:
The bottom electrode structure is segmented into two parts: a larger-diameter bottom portion (first bottom metal electrode) and a smaller-diameter top portion (second bottom metal electrode). This segmentation allows the lower portion to have lower resistance while the upper portion maintains compatibility with standard MTJ stack dimensions, thus reducing parasitic series resistance without proportionally increasing overall device complexity.
Solution Approach 2:
The electrode structure implements local quality by providing different diameters at different locations: the bottom portion has a larger diameter to reduce resistance, while the top portion has a smaller diameter to match MTJ stack requirements. This localized variation optimizes electrical performance where needed without compromising overall device architecture.
2Reliability
If the bottom metal electrode diameter is increased to reduce resistance, then read performance improves, but the manufacturing process becomes more complex
Solution Approach 1:
The sacrificial layer is deposited and patterned before the bottom metal electrode is formed. This preliminary action creates a predefined template that guides the electrode formation process, ensuring the complex two-level electrode structure is manufactured accurately without requiring additional complex steps during electrode deposition.
Solution Approach 2:
A sacrificial layer is introduced as an intermediary element during manufacturing. This layer is deposited, patterned, and then removed after serving its purpose of defining the electrode structure. The intermediary enables precise formation of the complex electrode geometry while simplifying the overall manufacturing process by using a temporary placeholder that is easily removed.
3Object-affected harmful factors
If a larger bottom electrode is used to reduce resistance, then effective tunnel magnetoresistance increases, but the MTJ stack integrity may be compromised during etching
Solution Approach 1:
The electrode is segmented vertically with a larger bottom portion and a smaller top portion. The smaller top portion aligns with the MTJ stack footprint, preventing etching damage to the stack while the larger bottom portion provides the low-resistance pathway needed for high effective tunnel magnetoresistance.
Solution Approach 2:
The electrode structure provides local quality by having different diameters at different heights: the top portion matches the MTJ stack dimensions to protect it during etching, while the bottom portion is enlarged to reduce resistance and enhance TMR effect without exposing the MTJ stack to etching damage.
Data Source
AI summary
An embedded magnetoresistive random-access memory (MRAM) device including a portion of a metal wiring layer above a semiconductor device and a bottom electrode over the portion of the metal wiring layer. The embedded MRAM where the bottom electrode connects to a first portion of a bottom surface of a magnetoresistive random access memory pillar and a sidewall spacer is on the magnetoresistive random access memory pillar. The embedded MRAM device includes a ring of inner metal is on the portion of the metal wiring layer surrounding a portion of the bottom electrode.