Embedded MTJ Module Integration in BEOL Wiring

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Solution Overview

Problem

Existing semiconductor manufacturing processes face challenges in integrating magnetic tunnel junction (MTJ) modules into back end of line (BEOL) wiring of logic devices without altering the device layout or architecture, which affects the reliability and electrical characteristics of the embedded devices.

Innovation Solution

The proposed solution involves a specific structure and manufacturing method for an embedded device that includes a magnetic tunnel junction (MTJ) module, with a stacked configuration of layers such as mold insulation layers, electrode contacts, and metal wiring structures, allowing the MTJ module to be integrated within the existing layout by varying the heights and shapes of bit line and metal wiring structures to ensure proper metal filling and minimize defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If MTJ module is integrated into BEOL wiring without changing layout, then device layout and architecture are preserved, but manufacturing complexity increases due to varying heights and shapes of wiring structures

Engineering Contradiction:
Improvedevice layoutVSAvoidmanufacturing process complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent resolves the contradiction by transitioning from a two-dimensional planar wiring layout to a three-dimensional stacked configuration. Multiple metal wiring structures are arranged at different vertical levels (first, second, and third mold insulation layers) with varying heights, allowing MTJ module integration without changing the top-down layout while managing manufacturing complexity through systematic vertical stacking

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If bit line structure and metal wiring structure have different heights, then proper metal filling is achieved, but structural complexity increases

Engineering Contradiction:
Improvemetal filling qualityVSAvoidwiring structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies local quality by giving different heights to different wiring structures based on their specific functional requirements. The bit line structure has a first height while metal wiring structures have a second height, with insulation layers selectively positioned to ensure proper metal filling in each region while managing overall structural complexity through localized differentiation

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables reliable integration of the MTJ module without changing the device layout, reducing defects and maintaining excellent electrical characteristics, thus enhancing the reliability and design flexibility of the embedded device.

Implementation Method 1

magnetic tunnel junction (MTJ) structure

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentUS11437432B2Embedded device and method of manufacturing the same
Publication Date: 2022.09.06 SAMSUNG ELECTRONICS CO LTD
  • US11437432B2 patent drawing
  • US11437432B2 patent drawing
  • US11437432B2 patent drawing

AI summary

An embedded device includes a first insulation layer, a second insulation layer on the first insulation layer, a lower electrode contact in the first insulation layer in a first region, a first structure, having a lower electrode, a magnetic tunnel junction, and an upper electrode, in the second insulation layer and contacting the lower electrode contact, a first metal wiring structure through the first and second insulation layers in a second region, a third insulation layer on the second insulation layer, a bit line structure through the third insulation layer and the second insulation layer in the first region, the bit line structure having a first height and contacting the upper electrode, and a second metal wiring structure through the third insulation layer in the second region, the second metal wiring structure contacting the first metal wiring structure, and having a second height lower than the first height.