Embedded Multi-Die Interconnect Bridge for Smaller Scalable Packages
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Solution Overview
Problem
Current microelectronic device technologies are limited in the number of dies that can be interconnected due to the size constraints of silicon chips, restricting the complexity and capability of multi-die packages.
Innovation Solution
The implementation of embedded multi-die interconnect bridges (EMIBs) that are embedded into the substrate during manufacturing, allowing for rapid communication between dies and incorporating components like metal resistors and capacitors to reduce size and increase efficiency, enabling more complex circuitry without the space constraints of traditional chip designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional silicon chip interconnection methods are used, then manufacturing simplicity is maintained, but the number of interconnectable dies is limited by chip size constraints
Solution Approach 1:
The system is divided into separate functional components: active dies and passive EMIBs. The EMIB acts as an intermediary carrier that segments the interconnection function from the computational function, allowing multiple dies to be connected without each die needing to accommodate all interconnection elements. This enables scaling to more dies without proportionally increasing individual die size.
Solution Approach 2:
The EMIB serves as an intermediary component between dies, containing TSVs, metal resistors, and capacitors that mediate the electrical connection and signal transmission. This intermediary structure offloads interconnection complexity from the dies themselves, allowing dies to remain smaller while supporting more interconnections.
2Adaptability or versatility
If more interconnection components are added to enable more dies to be connected, then interconnectivity increases, but chip size and complexity increase
Solution Approach 1:
Interconnection components (TSVs, resistors, capacitors) are segmented and placed on separate EMIB carriers rather than being integrated into each die. This segmentation distributes complexity across multiple simple components rather than concentrating it in complex integrated structures, enabling higher interconnectivity without proportional increases in individual die complexity.
Solution Approach 2:
The EMIB uses simplified copies of interconnection structures (standardized TSV arrays, metal resistor patterns, capacitor configurations) that can be replicated across multiple carriers. These copied structures provide the necessary electrical functions without the full complexity of complete die architectures, enabling scalable interconnectivity.
3Area of stationary object
If critical components like metal resistors and capacitors are integrated into the EMIB, then die size is reduced, but manufacturing complexity increases
Solution Approach 1:
Multiple passive components (metal resistors, capacitors, TSVs) are merged onto a single EMIB carrier during the wafer-level manufacturing process. This combining of components into an integrated passive component array achieves space efficiency while maintaining manufacturing simplicity through standardized wafer fabrication techniques that handle multiple component types in a unified process flow.
Solution Approach 2:
Passive components (metal resistors, capacitors) are preliminarily fabricated and positioned on the EMIB carrier during wafer manufacturing before the die are attached. This preliminary action of pre-assembling the passive component array on the EMIB simplifies subsequent die attachment and interconnection, as the EMIB arrives at the assembly stage with its passive components already in place and configured.
Data Source
AI summary
An integrated circuit package is disclosed. The integrated circuit package includes a first integrated circuit die, a second integrated circuit die, an organic substrate, wherein both the first integrated circuit die and the second integrated circuit die are connected to the organic substrate, a multi-die interconnect bridge (EMIB) embedded within the organic substrate, and a termination resistor associated with a circuit in the first integrated circuit die, wherein the termination resistor is located within the multi-die interconnect bridge embedded within the organic substrate.