Embedded NoC Support Die for FPGA Fabric Bandwidth Scaling
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Solution Overview
Problem
The limited space on a fabric die of a programmable logic device hinders the inclusion of a network-on-chip (NOC) circuit, which is necessary for efficient data communication between sectors, across different fabric dies, and between different programmable logic devices.
Innovation Solution
The programmable logic device is composed of two separate dies, where the first die contains primarily programmable logic fabric and the second die contains fabric support circuitry, including an embedded NOC, to facilitate data communication between sectors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a network-on-chip (NOC) circuit is included on the fabric die, then data communication efficiency between sectors is improved, but the available space for programmable logic fabric is reduced
Solution Approach 1:
The patent divides the programmable logic device into two separate dies: a fabric die containing the programmable logic fabric and a support die containing the NOC circuitry and other support functions. This segmentation allows each die to be optimized for its specific function without compromising the other, resolving the space conflict by physically separating the NOC from the fabric die.
Solution Approach 2:
The patent transitions from a two-dimensional layout on a single die to a three-dimensional stacked architecture where the fabric die and support die are vertically interconnected. This dimensional change enables the NOC to coexist with the fabric by moving it to a different spatial plane (vertical stacking), thereby preserving all fabric space while adding communication capabilities.
2Quantity of substance
If the NOC is integrated into the fabric die, then communication bandwidth is increased, but device complexity and manufacturing difficulty increase
Solution Approach 1:
By separating the NOC integration into a distinct support die, the patent reduces the complexity of the fabric die while maintaining high communication bandwidth. The support die becomes a specialized component that can be independently optimized and manufactured.
Solution Approach 2:
The support die serves multiple functions beyond just housing the NOC, including configuration memory, I/O interfaces, and other support circuitry. This multi-functionality consolidates several components into one die, reducing overall device complexity while maintaining communication performance.
3Adaptability or versatility
If configuration data is stored in external memory, then fabric reconfiguration flexibility is improved, but configuration speed is reduced
Solution Approach 1:
The patent implements a hierarchical memory structure where a portion of configuration memory is embedded in the support die (providing fast access) while the remainder resides in external memory (providing large capacity). This nested arrangement allows frequently accessed configuration data to be rapidly loaded from the embedded memory, while less frequently accessed data remains in external memory.
Solution Approach 2:
The embedded configuration memory in the support die pre-loads essential configuration data, allowing the fabric to be quickly configured without waiting for data transfer from external memory. This preliminary action in the embedded memory accelerates the reconfiguration process while maintaining flexibility.
Data Source
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AI summary
An integrated circuit device may include programmable logic fabric disposed on a first integrated circuit die, such that the programmable logic fabric may include a first region of programmable logic fabric and a second region of programmable logic fabric. The first region of programmable logic fabric is configured to be programmed with a circuit design that operates on a first set of data. The integrated circuit may also include network on chip (NOC) circuitry disposed on a second integrated circuit die, such that the NOC circuitry is configured to communicate data between the first integrated circuit die and the second integrated circuit die.