Embedded Non-Volatile Memory for SoC Configuration Persistence

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Solution Overview

Problem

System-on-chip designs face challenges in providing persistent data storage while maintaining low power consumption, which limits their ability to store configuration parameters and error data securely and efficiently.

Innovation Solution

Incorporating non-volatile storage circuitry with rewritable, persistent storage cells within the system-on-chip to store configuration parameters and error data, allowing for dynamic adjustment and secure storage without relying on external buses, using technologies like embedded MRAM, RRAM, PCM, FeFET, and FeRAM.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If non-volatile storage circuitry is added to system-on-chip, then persistent storage capability is improved, but device complexity increases

Engineering Contradiction:
Improvepersistent storage capabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges non-volatile storage circuitry directly into the system-on-chip substrate, integrating storage functionality with processing circuits. This consolidation provides persistent storage capability while avoiding the complexity of external storage interfaces and connections, as the storage cells are embedded within the same chip architecture.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The non-volatile storage circuitry is designed to serve multiple functions: storing configuration parameters for control circuitry, caching data for functional circuits, and providing persistent storage across power cycles. This multi-functionality reduces the need for separate dedicated storage components, thereby managing device complexity while improving reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If non-volatile storage circuitry is added to system-on-chip, then data retention across power cycles is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvedata retention capabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The storage circuitry is manufactured using the same semiconductor fabrication processes as the rest of the system-on-chip, merging the manufacturing workflows. This approach ensures data retention across power cycles while avoiding the need for separate manufacturing steps or assembly processes that would increase manufacturing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs non-volatile storage technologies (such as MRAM, RRAM, or FeFET) that utilize changes in physical parameters (magnetic resistance, resistive states, or ferroelectric polarization) to store data. These parameter changes occur during standard fabrication processes, enabling data retention capability without requiring complex post-manufacturing operations.

Inventive Principle:
Principle #35Parameter changes

3Speed

If local non-volatile storage is implemented, then access speed to configuration parameters is improved, but chip area increases

Engineering Contradiction:
Improveaccess speedVSAvoidchip area
Core Design Contradiction:
SpeedVSArea of stationary object

Solution Approach 1:

The patent implements local non-volatile storage cells positioned in close proximity to the functional circuits that require configuration parameters. This localized placement enables fast access speeds by minimizing signal transmission distances while optimizing chip area utilization through spatial distribution of storage resources near their usage points.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The storage circuitry is nested within the system-on-chip architecture at multiple hierarchical levels, with storage cells embedded alongside functional blocks. This nesting approach provides fast local access to configuration parameters while efficiently utilizing the available chip area by integrating storage within the existing circuit layout rather than adding separate storage arrays.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS11520658B2Non-volatile memory on chip
Publication Date: 2022.12.06 ARM LTD
  • US11520658B2 patent drawing
  • US11520658B2 patent drawing
  • US11520658B2 patent drawing

AI summary

A system-on-chip is provided that includes functional circuitry that performs a function. Control circuitry controls the function based one or more configuration parameters. Non-volatile storage circuitry includes a plurality of non-volatile storage cells each being adapted to write at least a bit of the one or more configuration parameters in a rewritable, persistent manner a plurality of times. Read circuitry locally accesses the non-volatile storage circuitry, obtains the one or more configuration parameters from the non-volatile storage circuitry and provides the one or more configuration parameters to the control circuitry. Write circuitry obtains the one or more configuration parameters and provides the one or more configuration parameters to the non-volatile storage circuitry by locally accessing the non-volatile storage circuitry.