Embedded Optoelectronic Die in Optical Waveguide
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current optical interconnects face challenges such as non-compatibility with high-volume manufacturing, complex alignment requirements, handling issues, and significant impact on substrate technology, limiting their ability to provide flexible high-bandwidth connections between chips without increasing costs.
Innovation Solution
Embedding thin optoelectronic dies within a free-standing optical waveguide defined by cladding layers, allowing for high-speed connections between chips without the need for optical alignment and handling, and minimizing disruptions to existing substrate technology.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If planar waveguide and connector are used for optical interconnect, then optical signal transmission is achieved, but fabrication and assembly are not High Volume Manufacturing compatible
Solution Approach 1:
The optical interconnect is divided into separate modular components: an optical module containing the OE die and a waveguide module. This segmentation allows each component to be manufactured independently using standard HVM processes, then assembled together, resolving the contradiction between achieving optical functionality and maintaining manufacturing compatibility.
Solution Approach 2:
A standardized connector serves as an intermediary component that interfaces between the optical module and the waveguide. This mediator enables HVM-compatible assembly by providing standardized mating interfaces that don't require complex custom alignment procedures, thus improving productivity while maintaining ease of manufacture.
2Manufacturing precision
If semi-active alignment is used for OE die and planar waveguide, then optical connection is established, but alignment precision requirements are high and process complexity increases
Solution Approach 1:
Alignment features and mechanical guides are built into the optical module and waveguide during their respective manufacturing processes, before the final assembly. This preliminary preparation of alignment structures eliminates the need for complex semi-active alignment procedures, reducing both precision requirements and process complexity while maintaining manufacturing precision.
3Device complexity
If OE die is embedded inside waveguide core, then optical alignment is eliminated, but substrate and motherboard technology are significantly impacted
Solution Approach 1:
The OE die is extracted from the substrate plane and placed in a separate optical module that interfaces with the waveguide through a connector. This extraction eliminates the need to modify substrate and motherboard technologies while still achieving simplified assembly without complex optical alignment, resolving the contradiction between reducing device complexity and maintaining adaptability.
4Ease of manufacture
If trench is made in substrate for planar waveguide, then waveguide fitting is enabled, but substrate structure is modified and manufacturing complexity increases
Solution Approach 1:
The waveguide is extracted from the substrate and placed in a separate module. This eliminates the need to create trenches or modify the substrate structure, simplifying substrate manufacturing while enabling waveguide integration through standardized connectors, thus improving ease of manufacture without increasing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables flexible, high-bandwidth interconnects between chips with reduced manufacturing complexity and cost, eliminating the need for optical alignment and handling, while maintaining compatibility with current substrate technology.
Implementation Method 1
an optical waveguide may include a lower cladding layer, an upper cladding layer, and a core layer disposed between the lower and upper layer, where the core has a higher index of refraction than the lower layer and the upper layer
Data Source
AI summary
An optical interconnect is provided which may allow flexible high-bandwidth interconnection between chips, eliminate the need for optical alignment between the optoelectrical (OE) die and waveguide during assembly because the OE die is at least partially embedded inside the waveguide (lower cladding layer, upper cladding layer, and core layer), eliminate the need for handling the optical interconnect at OEM, and not impact current substrate and motherboard technology.