Embedded Package Board Layout for Thin High-Integration SiP
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Solution Overview
Problem
There is a need for a technology that can miniaturize and reduce the thickness of IT-convergence products, such as system-on-chip (SoC) devices, while improving integration and space utilization in system-in-package (SiP) packages, as existing solutions face challenges in integrating multiple functions and components efficiently.
Innovation Solution
A package-embedded board design featuring a core layer with through-hole portions, electronic component packages, core insulating material, and wiring layers, which allows for the embedding of electronic components and optimization of space usage by reducing overall size and thickness through the use of lead-frame packages and insulating materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If electronic components are mounted on the surface of a board, then ease of manufacture is improved, but device thickness and occupied volume increase
Solution Approach 1:
The patent embeds electronic component packages within through-holes of the core layer, placing one structure inside another. The packages are positioned inside the core layer thickness rather than on its surface, effectively nesting the component packages within the board structure to reduce overall device thickness while maintaining manufacturability through standardized embedding processes
2Adaptability or versatility
If multiple electronic components are integrated in a SiP package, then functionality is improved, but space utilization efficiency deteriorates
Solution Approach 1:
The patent transitions from two-dimensional surface mounting to three-dimensional embedding by placing component packages within through-holes of the core layer. This vertical integration approach allows multiple components to be stacked or arranged in three-dimensional space, improving space utilization efficiency while maintaining the multi-functional capabilities of SiP packages
3Area of stationary object
If component packages are disposed close to edges of a core layer, then space utilization is improved, but reliability deteriorates due to increased stress and warpage
Solution Approach 1:
The patent applies different structural characteristics to different regions of the core layer. The through-holes for embedding packages are strategically positioned away from edges, and the core insulating material is selectively disposed to provide localized reinforcement and stress distribution. This creates regions of different mechanical properties within the core layer to simultaneously achieve space utilization and reliability
Data Source
AI summary
A package-embedded board includes: a core layer having a through-hole portion; a package at least partially disposed in the through-hole portion and including a die pad, an electronic component disposed on the die pad, and a molded portion covering the electronic component; and a core insulating material disposed in the through-hole portion and covering the core layer and the package.