Embedded IC Package-on-Package Height Reduction

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Solution Overview

Problem

Existing integrated circuit package technologies face challenges in reducing package dimensions, increasing manufacturing costs, and decreasing yields due to the need for additional space and complex processes for stacking and connecting multiple integrated circuits, while also risking damage to integrated circuits during embedding in printed circuit boards.

Innovation Solution

An embedded integrated circuit package-on-package system is developed, where a first integrated circuit package is embedded in a substrate with a low coefficient of thermal expansion encapsulant, allowing for stacking and connection of additional packages with exposed terminal pads and electrical vias, enabling flexible mounting configurations and reduced height without damaging the integrated circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple integrated circuits are stacked into a single package, then the integration density increases, but the package height cannot be sufficiently reduced due to spacer requirements

Engineering Contradiction:
Improveintegration densityVSAvoidpackage height
Core Design Contradiction:
Quantity of substanceVSLength of stationary object

Solution Approach 1:

The patent removes the traditional spacer structures from the package architecture. By eliminating spacers and using direct bonding between integrated circuit substrates, the solution extracts the unnecessary intermediate components that were preventing height reduction, thereby achieving higher integration density without compromising structural integrity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements a nested configuration where multiple integrated circuit substrates are directly bonded and stacked one on top of another without intermediate spacers. This nesting approach allows the substrates to be tightly integrated, minimizing the overall package height while maximizing the quantity of integrated circuits per package

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If conventional package technologies are used, then manufacturing processes are proven, but the package dimensions cannot be reduced and manufacturing costs increase

Engineering Contradiction:
Improvemanufacturing provennessVSAvoidpackage dimension
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent transitions from conventional lateral packaging arrangements to a vertical stacking architecture. By organizing integrated circuits in the vertical dimension rather than spreading them out laterally, the solution achieves significant package dimension reduction while maintaining manufacturing reliability through direct bonding processes

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Area of stationary object

If integrated circuits are embedded in holes formed in the printed circuit board, then space is saved, but damage to integrated circuits occurs due to different filling materials

Engineering Contradiction:
Improvespace utilizationVSAvoidintegrated circuit integrity
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent merges the substrate material with the filling material by using the same material for both, eliminating the material interface that causes damage. This unified material approach allows integrated circuits to be embedded in holes without the harmful effects of material mismatches, preserving circuit integrity while achieving space savings

Inventive Principle:
Principle #5Merging (Combining)

4Reliability

If spacers are used for electrical connections in stacked integrated circuits, then connections are established, but manufacturing costs increase and yields decrease

Engineering Contradiction:
Improveelectrical connectionVSAvoidmanufacturing cost and yield
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts and eliminates the spacer components from the stacked integrated circuit structure. By removing spacers and implementing direct substrate bonding, the solution reduces manufacturing complexity, lowers costs, and improves yields while maintaining reliable electrical connections between stacked circuits

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces electronic system dimensions, simplifies manufacturing, lowers costs, and improves yield by allowing flexible packaging configurations, efficient signal transmission, and minimizing damage to integrated circuits, while maintaining system performance and reliability.

Implementation Method 1

embedded in a substrate with a low coefficient of thermal expansion encapsulant

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS8546929B2Embedded integrated circuit package-on-package system
Publication Date: 2013.10.01 STATS CHIPPAC LTD
  • US8546929B2 patent drawing
  • US8546929B2 patent drawing
  • US8546929B2 patent drawing

AI summary

An embedded integrated circuit package-on-package system is provided forming a first integrated circuit package system, forming a second integrated circuit package system, and mounting the second integrated circuit package system over the first integrated circuit package system with the first integrated circuit package system, the second integrated circuit package system, or a combination thereof being an embedded integrated circuit package system or an embedded stacked integrated circuit package system.