Embedded Semiconductor Package With Wiring Across Substrate

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Solution Overview

Problem

Existing semiconductor packages fail to meet the requirements of next-generation devices in terms of reliability, compactness, high performance, and cost-effective manufacturing, particularly due to limitations in testing packaged dies before assembly and mismatch in coefficients of thermal expansion between dies and substrates.

Innovation Solution

A semiconductor package embedded in a substrate with a wiring portion extending across the substrate, allowing for pre-testing of dies, multiple dies in a single package, and reduced thermal expansion mismatch, featuring a base substrate with a cavity for the package, insulating material, and conductive connections through bonding pads and metal patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a semiconductor package is embedded in a substrate, then the compactness and integration density are improved, but the manufacturing complexity and assembly difficulty increase

Engineering Contradiction:
Improvepackage sizeVSAvoidassembly complexity
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent performs die testing within the package structure before final substrate assembly, allowing defect detection and elimination to occur prior to integration. This preliminary action simplifies the overall manufacturing process by preventing defective components from complicating subsequent assembly steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent embeds the semiconductor package within a cavity in the substrate, creating a nested structure where the package is contained within the substrate volume. This nesting approach improves compactness by utilizing three-dimensional space efficiently while maintaining organized separation between components.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Productivity

If multiple dies are placed in a single package, then the productivity and integration density are improved, but the manufacturing precision and yield control become more difficult

Engineering Contradiction:
Improveintegration densityVSAvoiddie placement precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent tests multiple dies within the package structure before final assembly with the substrate. This preliminary testing allows for yield verification and defect detection at the package level, enabling precision control to be maintained even when multiple dies are integrated in a single package.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If the package is embedded in the substrate, then the thermal expansion mismatch is reduced, but the manufacturing complexity increases

Engineering Contradiction:
Improvethermal expansion matchingVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent embeds the package within a cavity in the substrate, creating a nested configuration that allows for thermal expansion management. The embedded structure enables better thermal coupling and reduced mismatch between components with different expansion coefficients, while the cavity provides a controlled environment for the integration process.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS7888785B2Semiconductor package embedded in substrate, system including the same and associated methods
Publication Date: 2011.02.15 SAMSUNG ELECTRONICS CO LTD
  • US7888785B2 patent drawing
  • US7888785B2 patent drawing
  • US7888785B2 patent drawing

AI summary

A device includes a base substrate, a package including an encapsulated die, the package at least partially embedded in the base substrate, and a wiring portion on the package and extending across at least a portion of the base substrate adjacent to the package.