Embedded Packaging Substrate With Photosensitive Dielectric Layers
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Solution Overview
Problem
Existing methods for manufacturing embedded device packaging substrates face challenges such as poor control over frame thickness, inefficient material removal, weak mechanical strength due to organic materials, and risk of delamination from differing thermal expansion coefficients and poor bonding between materials, especially under high-heat conditions.
Innovation Solution
A method involving the formation of a first circuit layer, lamination of photosensitive layers to create a dielectric layer, partial removal to ensure a minimum thickness, and the addition of a second dielectric layer with a second circuit layer connected through conductive copper pillars, using adhesive photosensitive materials to enhance bonding strength and reduce delamination risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If CCL-based scheme is used for device embedding, then the device can be embedded with a frame, but the thickness control of the frame is poor due to material limitations
Solution Approach 1:
The patent changes the material parameter from traditional CCL to photosensitive material, which enables precise thickness control through photoetching processes. The photosensitive material allows for controlled material removal with precision down to micrometer level, directly resolving the frame thickness control issue while maintaining ease of manufacture through standard PCB fabrication processes.
Solution Approach 2:
The patent replaces mechanical or laser material removal methods with photoetching technology. This substitution enables more precise and efficient material removal, achieving both good thickness control and high manufacturing efficiency, thus resolving the contradiction between precision and ease of manufacture.
2Manufacturing precision
If coreless technique is used, then the finished product quality is high, but the process becomes complex and mechanical strength is weak due to organic materials
Solution Approach 1:
The patent uses photosensitive material that is homogeneous in composition and properties throughout the substrate. This uniform material allows for simplified processing compared to coreless techniques, reducing process complexity while maintaining high finished product quality through consistent material behavior during fabrication.
3Ease of manufacture
If manufacturing is done without a frame, then the process is simplified, but delamination risk increases due to different CTEs and poor bonding between materials
Solution Approach 1:
The patent employs a composite structure where photosensitive material serves as both the substrate and the embedding medium. This unified composite approach eliminates the interface between dissimilar materials, thereby preventing delamination issues while maintaining process simplicity. The photosensitive material provides both structural support and bonding function in a single integrated layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves bonding strength between materials, reduces the risk of delamination under heat exposure, and enhances the mechanical strength of the finished product by ensuring uniform material composition and adequate thickness, making it suitable for high-strength applications.
Implementation Method 1
providing a second photosensitive layer in such a manner that the second photosensitive layer covers the embedded device, where materials of the first photosensitive layer and the second photosensitive layer are the same, and the first photosensitive layer and the second photosensitive layer form a first dielectric layer
Data Source
AI summary
A method for manufacturing embedded device packaging substrate, a packaging substrate, and a semiconductor are disclosed. The method includes: forming a first circuit layer; laminating a first photosensitive layer onto the first circuit layer; providing an embedded device on the first photosensitive layer, with a pin face of the embedded device facing away from the first photosensitive layer; providing a second photosensitive layer covering the embedded device; partially removing the first dielectric layer such that a minimum thickness of the first dielectric layer covering a side surface of the embedded device is greater than or equal to a preset threshold; providing a second dielectric layer covering the first dielectric layer; and forming, on the second dielectric layer, a second circuit layer that is electrically connected to the first circuit layer and the embedded device.


