Embedded Packaging Module Via Hole Alignment

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Solution Overview

Problem

The existing embedded packaging structures for chips face challenges in reliability and yield due to process accuracy issues, leading to misalignment of via holes with bonding pads, which affects current-flowing capability and reliability.

Innovation Solution

The embedded packaging module incorporates positioning bulges on the semiconductor device's surface, which serve as anchor points for laser drilling to accurately position via holes in the packaging layer, ensuring they contact the bonding pads without overlap, and are filled with metal for improved electrical connectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If traditional embedded packaging structure is used, then chip integration is improved, but manufacturing precision deteriorates due to via hole misalignment with bonding pads

Engineering Contradiction:
Improvechip integrationVSAvoidvia hole positioning accuracy
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

Positioning bulges are pre-formed on the semiconductor device surface before packaging layer formation. These bulges serve as predetermined reference markers that guide subsequent via hole drilling, ensuring accurate alignment with bonding pads without requiring complex real-time adjustment during manufacturing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The positioning bulges act as intermediary reference elements between the semiconductor device and the via holes. By providing physical markers on the device surface, they mediate the alignment process, enabling the drilling apparatus to accurately locate and drill via holes at the correct positions relative to bonding pads.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If process accuracy is improved to prevent misalignment, then via hole positioning accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvevia hole positioning accuracyVSAvoidpackaging structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The positioning function is segmented from the main packaging structure. Instead of relying on complex alignment mechanisms integrated into the packaging process, the positioning function is separated into distinct positioning bulges that are independently formed on the semiconductor device, simplifying the overall packaging structure while maintaining high positioning accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The semiconductor device itself provides the positioning reference through the positioning bulges formed on its surface. This self-service approach eliminates the need for external alignment fixtures or complex positioning mechanisms in the packaging equipment, reducing device complexity while achieving high via hole positioning accuracy.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the accuracy of via hole processing, increases the number and diameter of via holes, reduces internal resistance, and improves heat dissipation, thereby enhancing the current-flowing capability and reliability of the chip packaging.

Implementation Method 1

processing at least one first via hole in the first packaging layer by a laser drilling process

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Implementation Method 2

filling the first via hole with metal

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS11552039B2Embedded packaging module and manufacturing method for the same
Publication Date: 2023.01.10 DELTA ELECTRONICS (SHANGHAI) CO LTD
  • US11552039B2 patent drawing
  • US11552039B2 patent drawing
  • US11552039B2 patent drawing

AI summary

The present disclosure relates to an embedded packaging module comprising a first semiconductor device, a first packaging layer and a first wiring layer, the first semiconductor device having a first and a second face, at least two positioning bulges and at least one bonding pad being provided on the first face of the first semiconductor device; the first packaging layer being formed on both the first face and a surface adjacent to the first face, the positioning bulges being positioned in the first packaging layer, at least one first via hole being provided in the first packaging layer, the bottom of the first via hole being positioned in the bonding pad and contacting with the bonding pad; the first wiring layer being positioned on the side of the first packaging layer away from the first semiconductor device and being electrically connected with the bonding pad through the first via hole.