Embedded Passive Components in Packaging Substrate Cavities
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Solution Overview
Problem
Conventional flip chip ball grid array packaging substrates face challenges in miniaturization and high-density packaging due to surface-mounted passive components, which increase the surface area, lead to long transmission paths, parasitic induction, and poor electrical performance, and result in a bulky package structure.
Innovation Solution
A packaging substrate structure with embedded electronic components, featuring a core board with wiring layers, a built-up structure with cavities for component placement, and a solder mask to expose electrode pads, along with a method involving etching, electroplating, and adhesive layers to integrate components and enhance heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If passive components are disposed on the surface of the packaging substrate by surface mount technology, then the number of passive components can be increased according to design demand, but the surface area of the packaging substrate must be increased accordingly
Solution Approach 1:
The patent transitions from surface mounting (2D arrangement) to embedded mounting (3D integration) by creating cavities within the substrate layers. Passive components are placed inside these cavities, utilizing the vertical dimension and internal volume of the substrate rather than only the surface area, thereby increasing component density without expanding the substrate footprint.
Solution Approach 2:
The patent implements nesting by placing passive components inside cavities formed within the substrate structure. The cavities are embedded within the layers of the packaging substrate, allowing components to be nested within the substrate volume rather than mounted on the external surface, effectively hiding components within the structure.
2Ease of manufacture
If passive components are disposed on the surface of the packaging substrate, then component placement is simplified, but the transmission path length increases and parasitic induction occurs
Solution Approach 1:
The patent extracts passive components from the surface mounting position and relocates them into embedded cavities within the substrate. This extraction from the surface eliminates the need for long external transmission paths and associated parasitic inductance, while the components remain accessible through controlled access openings for manufacturing purposes.
Solution Approach 2:
The patent introduces cavities as intermediary structures that provide both electrical connection pathways and physical housing for passive components. These cavities serve as mediators between the surface mounting approach (ease of manufacture) and embedded integration (electrical performance), allowing components to be accessed during manufacturing while being positioned optimally for electrical performance during operation.
3Ease of operation
If passive components are disposed on the surface of the packaging substrate, then component access is facilitated, but the package structure height increases
Solution Approach 1:
The patent inverts the conventional approach by instead of mounting components on the external surface, creating internal cavities within the substrate layers and placing components inside. This inversion moves components from the vertical exterior to the internal horizontal planes, reducing overall package height while maintaining accessibility through controlled openings.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach saves wiring layout space, reduces transmission paths, improves electrical performance, and enables a more compact and reliable package structure by embedding electronic components within the substrate, addressing the limitations of surface-mounted components.
Implementation Method 1
the heat generated from the electronic component in the cavity can be efficiently dissipated through the metal layer so as to enhance the performance and lifetime of the electronic component
Implementation Method 2
a cavity to expose the surface of the core board
Implementation Method 3
at least one first wiring layer disposed on the first dielectric layer, and a plurality of first conductive vias electrically connecting to the first wiring layer
Data Source
AI summary
A packaging substrate structure with electronic components embedded therein and a method for fabricating the same are disclosed. The packaging substrate structure comprises a core board with a wiring layer on the two opposite surfaces thereof; a first built-up structure disposed on at least one surface of the core board and having a cavity to expose the surface of the core board; an electronic component disposed in the cavity and having an active surface and an inactive surface, where the active surface has pluralities of electrode pads and the inactive surface faces the surface of the core board; and a solder mask disposed on the surfaces of the first built-up structure and the electronic component, where the solder mask has pluralities of first openings to expose the electrode pads of the electronic component. Accordingly, the packaging substrate disclosed by the present invention can efficiently enhance electrical performance and product reliability.


