Embedded Passive Device Microelectronic Package Thickness Reduction
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Solution Overview
Problem
The challenge in microelectronic package fabrication lies in reducing the thickness of passive microelectronic devices, such as integrated passive devices and surface mount devices, which require specific volumes of component material for functionality, making it difficult to miniaturize without compromising performance or increasing costs.
Innovation Solution
A microelectronic package design that incorporates a package body with a cavity for a passive microelectronic device, using dielectric layers and conductive routes for electrical connections, allowing for the placement of passive devices in a way that reduces the overall package height while maintaining functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the volume of component material in passive microelectronic devices is reduced to decrease thickness, then the package thickness is reduced, but the performance (capacitance value, inductance value) is compromised
Solution Approach 1:
The patent transitions from planar surface-mount passive devices to three-dimensional vertically stacked passive devices. Multiple passive device layers are stacked in the vertical dimension within the package body, allowing increased component material volume and improved performance without increasing the horizontal footprint, thereby enabling thin package design while maintaining device performance
Solution Approach 2:
The patent embeds multiple passive device layers within the package body in a nested configuration. Each passive device layer is positioned at different vertical levels, with conductive vias connecting them through the package body. This nesting approach maximizes the use of vertical space to accommodate sufficient component material volume for desired performance while keeping the overall package thickness controlled
2Length of stationary object
If unconventional component materials are used to reduce component material volume, then the package thickness is reduced, but the cost of the passive microelectronic device increases prohibitively
Solution Approach 1:
The patent changes the geometric parameters of conventional passive device components by forming them in multiple vertical layers with conductive vias connecting them. This dimensional reconfiguration allows using standard, cost-effective component materials while achieving reduced overall package thickness through optimized spatial arrangement rather than material substitution
Solution Approach 2:
The patent employs a composite structure consisting of multiple passive device layers combined with conductive via materials and dielectric materials. This composite approach uses conventional, cost-effective materials in a multi-layer configuration that achieves thickness reduction without requiring expensive unconventional materials
3Length of stationary object
If passive microelectronic devices are made thinner to reduce package height, then the package thickness is reduced, but the volume of component material is insufficient for desired functionality
Solution Approach 1:
The patent utilizes the vertical dimension by stacking multiple passive device layers at different heights within the package body. This three-dimensional arrangement increases the total component material volume available for achieving desired capacitance or inductance values while maintaining a controlled overall package thickness through efficient vertical space utilization
Data Source
Figure 1A~1B
Figure 1C~1D
Figure 1E~1F
AI summary
A microelectronic package including a passive microelectronic device disposed within a package body, wherein the package body is the portion of the microelectronic package which provides support and/or rigidity to the microelectronic package. In a flip-chip type microelectronic package, the package body may comprise a microelectronic substrate to which an active microelectronic device is electrically attached. In an embedded device type microelectronic package, the package body may comprise the material in which the active microelectronic device is embedded.