Embedded Passive Components in Multi-Layer PCBs
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing PCB structures face challenges in efficiently embedding passive electronic components vertically, particularly in multi-layer boards, where space is limited and parasitic effects need to be minimized, and conventional methods require additional plating steps and are not cost-effective.
Innovation Solution
A multi-layer PCB structure with through-hole vias featuring vertically aligned plated electrodes separated by isolation sections, coated or filled with electronically active materials, allowing for the creation of embedded electronic components without the need for temporary blocking of holes or additional plating steps, using a process that includes drilling, counter-boring, and back-drilling to form the electrodes and vias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional methods are used to embed passive components in PCB, then components can be integrated into the board, but additional plating steps and temporary blocking are required which increases manufacturing complexity and cost
Solution Approach 1:
The invention extracts the plating operation from the via formation process. Instead of plating the entire via and then removing sections, the method forms vias without plating the isolation sections, eliminating the need for temporary blocking and complex plating/removal cycles. This reduces manufacturing steps while maintaining the embedded component functionality.
Solution Approach 2:
The invention performs preliminary actions by forming the via structure and applying plating only to specific sections (electrode portions) before embedding the passive component. This preliminary selective plating eliminates the need for subsequent plating steps and temporary blocking, simplifying the overall manufacturing process.
2Area of stationary object
If planar topologies are used for embedding passive components, then components can be integrated, but space on the board is consumed and parasitic effects are not minimized
Solution Approach 1:
The invention transitions from planar (2D) topology to vertical (3D) topology by forming via structures that extend through the PCB layers. Passive components are embedded within these vertical vias, utilizing the third dimension (depth/height) rather than consuming additional board surface area. This vertical arrangement minimizes parasitic effects by reducing current path lengths and improving signal integrity.
3Reliability
If electroless plating is used to cap via openings, then embedded components can be formed, but the process is not cost-effective and requires additional manufacturing steps
Solution Approach 1:
The invention applies local quality by providing plating only in specific locations (the electrode portions of the via) rather than uniformly plating the entire via. This selective local plating eliminates the need for electroless plating to cap openings, as the plated sections naturally form the electrode structures needed for embedded components, thereby improving manufacturing efficiency.
4Quantity of substance
If vertical embedding is implemented, then high-density integration is achieved, but conventional manufacturing processes must be modified
Solution Approach 1:
The invention segments the via structure into distinct functional portions: plated electrode sections for electrical connection and unplated isolation sections for component embedding. This segmentation is achieved through selective plating processes that treat different via regions differently, enabling vertical high-density integration while using adapted conventional manufacturing techniques rather than entirely new processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables cost-effective, high-density integration of passive components with reduced parasitic effects, improved power-handling capabilities, and flexibility in material selection, while maintaining conventional PCB manufacturing processes, and allows for bulkier components with enhanced performance in smaller PCB areas.
Implementation Method 1
electroless plating to cap the top and bottom of an insulated via
Implementation Method 2
a plated ring; and an isolation section separating each of the electrodes
Data Source
AI summary
A PCB, printed circuit board, structure for forming at least one embedded electronic component. The structure comprises a multi-layer PCB board comprising at least one through-hole via, the via comprising a plurality of electrodes vertically aligned within the via, each electrode comprising a plated ring; and an isolation section separating each of the electrodes.