Embedded PCB With Exposed Bump Terminals for Area Reduction

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Solution Overview

Problem

Current printed circuit boards (PCBs) face challenges in reducing surface area requirements, increasing efficiency, and lowering manufacturing costs while improving electrical properties and reliability, particularly in embedding passive devices and reducing inductance due to connection distances between active and passive devices.

Innovation Solution

The solution involves embedding electronic components in an insulation layer with a connection terminal exposed on the surface, forming a bump on the connection terminal, and using a solder resist layer with an adhesive layer and surface treatment to enhance connectivity and reliability, along with a circuit layer and build-up layers made from various materials like thermosetting or thermoplastic polymers and ceramics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If passive devices are installed on the surface of the PCB, then the PCB can provide basic electronic circuit functions, but the surface area required increases and the package size cannot be reduced

Engineering Contradiction:
Improvesurface area of PCBVSAvoidmulti-functionality of PCB
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent transitions from surface-mounted passive devices to embedded passive devices within inner layers of the PCB. This dimensional change from 2D surface mounting to 3D embedding allows the PCB to maintain multi-functionality while significantly reducing the required surface area and enabling smaller package sizes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent embeds passive devices within the inner layers of the PCB structure, nesting them inside the board rather than placing them on the surface. This nesting approach allows multiple functional elements to coexist within a compact volume, reducing overall package size while maintaining versatility.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If connection distance between active devices and passive devices is reduced, then inductance decreases and electrical properties improve, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical properties of PCBVSAvoidmanufacturing complexity of PCB
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges active devices, passive devices, and interconnections into a single integrated PCB structure where passive devices are embedded within inner layers and active devices are mounted on the surface. This integration eliminates separate components and reduces connection distances, improving electrical properties while the standardized manufacturing process controls complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If the number of soldered joints is reduced, then mounting reliability increases, but connection flexibility decreases

Engineering Contradiction:
Improvemounting reliability of PCBVSAvoidconnection flexibility of PCB
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent combines passive devices directly into the PCB inner layers with integrated trace connections, eliminating the need for separate surface-mounted passive components and their associated solder joints. This merging reduces the total number of soldered joints, improving mounting reliability while maintaining connection flexibility through the integrated circuit traces.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10779414B2Electronic component embedded printed circuit board and method of manufacturing the same
Publication Date: 2020.09.15 SAMSUNG ELECTRO MECHANICS CO LTD
  • US10779414B2 patent drawing
  • US10779414B2 patent drawing
  • US10779414B2 patent drawing

AI summary

A printed circuit board and method thereof include an electronic component embedded in an insulation layer and comprising a connection terminal exposed on a surface of the insulation layer. The printed circuit board and method thereof also include a bump formed on the connection terminal of the electronic component and exposed on the surface of the insulation layer.