Embedded PCB Impedance Matching Network for Doherty Amplifier Parasitics
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Solution Overview
Problem
Conventional RF/microwave discrete power transistor packages face performance and power consumption issues due to parasitic capacitances, inductances, and resistances in input/output matching networks, primarily attributed to mutual inductance and capacitive coupling between bond wires and bond pads, which are difficult to mitigate effectively.
Innovation Solution
A semiconductor package design incorporating a multilayer circuit board with embedded electrically conductive layers separated by composite fiber layers and a high dielectric constant dielectric layer, allowing for integrated RF impedance matching networks and reduced parasitic effects, thereby improving performance and space efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional discrete reactive components (capacitors and inductors) are used for input/output matching networks, then the matching network can be implemented with standard components, but parasitic capacitances, inductances, and resistances deteriorate performance and power consumption
Solution Approach 1:
The patent merges the matching network functionality directly into the PCB substrate by creating embedded capacitive structures within the multilayer board. Instead of using separate discrete capacitors and inductors connected by bond wires, the capacitive elements are formed by conductive traces on different PCB layers separated by dielectric material, integrating the matching network into the board structure itself. This eliminates bond wire parasitics and reduces overall parasitic effects.
Solution Approach 2:
The patent introduces the PCB dielectric layers as intermediary structures that serve dual purposes: providing electrical insulation between conductive traces while simultaneously forming the capacitive element of the matching network. The dielectric material acts as the mediator between signal traces, creating controlled capacitance values that are precisely determined by the dielectric properties and geometric dimensions of the PCB layers.
2Ease of operation
If bond wires are used to connect RF transistor to matching network components, then electrical connection can be established, but mutual inductance and capacitive coupling between bond wires and bond pads create parasitic effects
Solution Approach 1:
The patent extracts and eliminates the bond wire connection method entirely by establishing direct trace-to-pad connections within the PCB structure. The matching network capacitive elements are formed by PCB traces that connect directly to transistor pins through controlled impedance paths, removing the intermediate bond wire structures that generate parasitic mutual inductance and capacitive coupling effects.
Solution Approach 2:
The patent transitions from a planar connection approach using bond wires to a three-dimensional embedded structure within the multilayer PCB. Capacitive elements are formed by conductive traces on different layers separated by dielectric material, utilizing the vertical dimension of the multilayer structure to create compact, low-parasitic matching networks with precise electrical characteristics.
3Ease of manufacture
If conventional PCB structures are used, then manufacturing is straightforward, but achieving high capacitance values in compact space is difficult
Solution Approach 1:
The patent utilizes the composite structure of multilayer PCB materials, combining conductive copper traces with high-performance dielectric layers to create embedded capacitive elements. The dielectric constant and thickness of the PCB substrate layers are precisely controlled to achieve specific capacitance values, while the conductive traces form the electrodes. This composite approach enables high capacitance values in compact footprints while maintaining standard PCB manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces parasitic effects and enhances the impedance matching, leading to improved performance and power handling capabilities within a compact package size, achieving higher capacitance values and efficient RF component integration compared to conventional PCBs.
Implementation Method 1
an embedded dielectric layer disposed between the two embedded electrically conductive layers. The embedded dielectric layer has a higher dielectric constant than the layers of composite fiber
Data Source
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Figure 2A
Figure 2B
AI summary
A Doherty amplifier includes a metal baseplate having a die attach region and a peripheral region, a main amplifier and one or more peaking amplifiers, wherein each amplifier comprises a transistor die that includes at least one RF terminal, a multilayer circuit board and an RF impedance matching network. The multilayer circuit board includes a first side attached to the peripheral region, a second side facing away from the baseplate, a first embedded electrically conductive layer that is separated from the first side by a first embedded composite fiber layer, a second embedded electrically conductive layer that is separated from the second side by a second embedded composite fiber layer, and an embedded dielectric layer that is disposed between the first and second embedded electrically conductive layers, and that has a higher dielectric constant than either of the first and second embedded composite fiber layers. The RF impedance matching network is electrically connected to an RF terminal of at least one of the amplifier transistor dies, and comprises one or more reactive components formed from at least one of the embedded electrically conductive layers.