Embedded PCB Semiconductor Package with Stacked Die Integration
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Solution Overview
Problem
Conventional semiconductor packages with multiple die are limited in reducing PCB size and improving interconnections between chips, necessitating a more efficient design for denser integration.
Innovation Solution
A semiconductor package design featuring an insulator with conductive regions on both sides, a leadframe with conductive traces, and wire bonds connecting dies, encapsulated with material to form external terminals, allowing for compact packaging and enhanced interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional packaged die are mounted on a printed circuit board, then each die requires separate packaging and mounting space, but this increases the overall PCB space requirements and reduces connection density
Solution Approach 1:
Multiple individually packaged die are merged into a single hybrid semiconductor package structure. The die are mounted on a common substrate with integrated interconnection structures, eliminating the need for separate PCB mounting holes and traces for each die, thereby reducing overall PCB space while maintaining electrical functionality
Solution Approach 2:
Multiple die are nested within a single package housing structure. The die are arranged in a compact configuration on the substrate, with interconnection structures nested between and around the die, achieving high density integration within a confined package volume
2Productivity
If multiple die are integrated in a single package, then connection density between chips is improved, but the interconnection structure becomes more complex
Solution Approach 1:
Interconnection structures extend in multiple dimensions within the package - vertically through vias and horizontally across the substrate. This multi-dimensional routing approach enables high connection density between multiple die without requiring excessively complex planar trace layouts, as connections can proceed through three-dimensional space including via holes and stacked configurations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables a smaller package size and improved electrical connections between multiple dies, reducing PCB space requirements while maintaining electrical functionality.
Implementation Method 1
at least one die located in the at least one cavity and having a third plurality of solder bumps on a first side thereof, a leadframe having a fourth plurality of conductive traces, at least one of the fourth plurality of conductive traces being attached to at least one of the third plurality of the solder bumps
Implementation Method 2
a fifth plurality of wire bonds connecting the at least another die with the leadframe
Data Source
AI summary
A two tier power module has, in one form thereof, a PC board having upper and lower traces with an opening in the insulating material that contains a power device which has upward extending solder bump connections. An upper leadframe is mounted on the solder bumps and the upper tracks of the PC board. Vias in the PC board connect selected upper and lower traces. A control device is mounted atop the leadframe and wire bonded to the leadframe, and the assembly is encapsulated leaving exposed the bottom surfaces of the lower traces of the PC board as external connections. In another form the PC board is replaced by a planar leadframe and the upper leadframe has stepped sections which make connections with the planar leadframe, the bottom surfaces of the planar leadframe forming external connections of the module.