Embedded PCB Conductive Layer Interconnects Without Drilled Vias
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Solution Overview
Problem
Current methods for embedding circuitry into printed circuit boards (PCBs) are inefficient and require extensive drilling and vias formation, leading to increased production costs and potential performance issues due to parasitic losses and thermal limitations.
Innovation Solution
The method involves coupling conductive layers directly to the integrated circuit die using a touch technology approach, reducing the need for drilling by forming raised profiles and using etching to create connections between layers, which allows for larger cross-section connections and improved thermal performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If traditional drilling and via formation methods are used to embed circuitry into PCBs, then electrical connections can be established between layers, but parasitic losses increase and thermal performance deteriorates
Solution Approach 1:
The patent removes the intermediate via structures from the signal path by directly bonding the integrated circuit die to the PCB substrate. This extraction of the via layer eliminates the parasitic inductance and resistance associated with via formations, while maintaining electrical connectivity through direct die-to-substrate contact pads.
Solution Approach 2:
The patent transitions from a traditional multi-layer PCB architecture with vertical via connections to a direct bonding approach where the die itself serves as the interconnection medium. This dimensional reorganization places the circuitry in direct contact with the substrate, eliminating the need for intermediate via structures and reducing parasitic effects.
2Ease of manufacture
If extensive drilling operations are performed to create vias for circuit embedding, then electrical connections are formed, but production costs increase and manufacturing time extends
Solution Approach 1:
The patent performs preliminary bonding of the integrated circuit die to the PCB substrate before any subsequent PCB layer processing. This preliminary action establishes the final interconnection geometry early in the manufacturing process, eliminating the need for later drilling and via formation operations, thereby reducing both cost and manufacturing time.
Solution Approach 2:
Instead of the conventional approach of first creating the PCB substrate with all necessary vias and drill holes, then mounting the die, this patent inverts the sequence by first bonding the die to a base substrate and then completing the PCB fabrication process around the already-mounted die. This inversion eliminates the need for post-die-bonding drilling operations.
3Temperature
If multiple conductive layers are formed with extensive via connections, then complete circuit routing is achieved, but thermal performance deteriorates due to thermal resistance at via interfaces
Solution Approach 1:
The patent extracts the thermal resistance barrier by removing the via interfaces from the heat flow path. By directly bonding the die to the substrate, heat can flow directly from the die through the bonding interface into the substrate without encountering the additional thermal resistance of via structures, significantly improving thermal performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces parasitic losses, enhances thermal performance, and lowers production costs by minimizing drilling operations and using additive processing over subtractive methods, resulting in more efficient electrical connections.
Implementation Method 1
applying a conductive material into the one or more holes through the first frontside conductive layer to electrically couple the first frontside conductive layer to the frontside contacts of the integrated circuit die
Implementation Method 2
applying a conductive material into the one or more holes to electrically couple the first frontside conductive layer to the backside conductive layer. Applying the conductive material into the one or more holes can include forming one or more barrel plated vias
Data Source
AI summary
A die can be applied to a front conductive layer. Openings can be formed in the conductive layer over contact points on the die. The openings can be filled with a conductive material to electrically couple the conductive layer to the contact points on the die. The front conductive layer can be etched to form a first conductive pattern. Conductive standoffs can be formed on portions of the front conductive layer. An additional front conductive layer can be laminated onto the front side. Openings can be formed in the additional front conductive layer over the standoffs. The openings can be filled with a conductive material to electrically couple the additional conductive layer to the underlying standoffs. The additional conductive layer can be etched to form a second conductive pattern.