Embedded PN Junction in SOI Substrate Cavity
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Solution Overview
Problem
In the fabrication of SOI integrated circuits, the formation of PN junctions in the crystalline substrate material is challenging due to material removal during wet chemical etch processes, which affects the accuracy of temperature sensing and transistor performance, leading to unreliable diode characteristics and potential short circuits.
Innovation Solution
The formation of PN junctions is improved by creating a cavity in the substrate material that is partially filled with doped semiconductor material, using selective epitaxial growth to adjust junction characteristics and reduce leakage currents, and positioning the junction to avoid interaction with subsequent silicidation processes, thereby maintaining a desired overlap and stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If PN junctions are formed in the crystalline substrate material using conventional methods, then the substrate diode structure is created, but material removal during wet chemical etch processes affects the accuracy of temperature sensing and transistor performance
Solution Approach 1:
The cavity is formed in the crystalline substrate material before the PN junction formation step. This preliminary action defines a precise geometric reference structure that protects the junction position from subsequent material removal during wet chemical etching, thereby maintaining both manufacturing precision and temperature sensing accuracy
Solution Approach 2:
The cavity acts as an intermediary structure between the substrate diode formation and the metal silicide deposition. By positioning the PN junction within this pre-formed cavity, the structure mediates the interaction between subsequent processing steps, preventing material removal from affecting the junction characteristics
2Device complexity
If the PN junction is positioned close to the opening for efficient fabrication, then the process complexity is reduced, but the junction interacts with subsequent silicidation processes causing short circuits
Solution Approach 1:
The substrate surface is segmented into distinct functional zones: the cavity region containing the PN junction and the surrounding area for metal silicide formation. This spatial segmentation allows the junction to be positioned efficiently near the opening while preventing interaction with silicidation processes through the cavity's geometric boundaries
Solution Approach 2:
The cavity structure provides preliminary protection against the harmful effect of silicidation on the PN junction. By pre-defining the junction location within the cavity, the structure anticipates and prevents the short circuit problem that would otherwise occur during subsequent silicide deposition
3Ease of manufacture
If wet chemical etch processes are used for fabrication, then the manufacturing process is simplified, but material removal affects junction characteristics and causes leakage currents
Solution Approach 1:
The cavity structure converts the potentially harmful material removal effect of wet chemical etching into a beneficial outcome. By pre-defining the junction location within the cavity, the etch process removes material only from areas outside the cavity, thereby simplifying fabrication while simultaneously protecting the junction from degradation and leakage currents
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and accuracy of temperature sensing and transistor performance by reducing the impact of material removal and leakage currents, while maintaining a stable diode characteristic and avoiding short circuits.
Implementation Method 1
forming a semiconductor material in the cavity, wherein at least a portion of the semiconductor material comprises a dopant species so as to form a PN junction with the crystalline material
Data Source
AI summary
The PN junction of a substrate diode in a sophisticated SOI device may be formed on the basis of an embedded in situ doped semiconductor material, thereby providing superior diode characteristics. For example, a silicon/germanium semiconductor material may be formed in a cavity in the substrate material, wherein the size and shape of the cavity may be selected so as to avoid undue interaction with metal silicide material.


