Embedded MOSFET Power Module Packaging for Low Inductance Cooling
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Solution Overview
Problem
Traditional power module packaging struggles with high parasitic inductance and limited heat dissipation, particularly in high-frequency and high-temperature applications, leading to issues like overvoltage, parasitic oscillation, and reduced reliability.
Innovation Solution
A package structure with a multi-layer plate-like design featuring a top and bottom insulation layer, metal pattern layers, solder connections, and embedded MOSFET bare dies with metal connection blocks, eliminating bonding wires and utilizing blind vias and metal plating for efficient heat dissipation and reduced parasitic inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional substrate and bonding wire packaging is used, then electrical interconnection is achieved, but parasitic inductance increases
Solution Approach 1:
The patent removes bonding wires from the package structure entirely, replacing them with direct metal-to-metal connections through the DBC substrate. This extraction of the bonding wire component eliminates the primary source of parasitic inductance while maintaining electrical interconnection functionality through alternative pathways.
Solution Approach 2:
The patent transitions from planar electrical connections to three-dimensional vertical connections by routing current through the thickness of the DBC substrate. This dimensional change allows current to flow directly from top to bottom surfaces, significantly reducing the loop area and associated parasitic inductance compared to traditional bonding wire paths.
2Device complexity
If single heat dissipation path through bottom is used, then thermal management is simplified, but heat dissipation efficiency decreases
Solution Approach 1:
The patent divides the heat dissipation function into two independent pathways: one through the bottom of the DBC substrate and another through the top surface. This segmentation allows heat to be dissipated simultaneously in multiple directions, effectively doubling the heat dissipation capacity while maintaining relatively simple structural design.
Solution Approach 2:
The DBC substrate is designed to serve dual functions: electrical insulation and heat dissipation. By making the substrate itself thermally conductive and providing heat dissipation paths through both surfaces, the substrate becomes a multi-functional component that simultaneously manages electricity and heat, eliminating the need for separate heat sinking structures.
3Object-affected harmful factors
If DBC+PCB hybrid packaging or three-dimensional packaging is used, then parasitic inductance is reduced, but structure complexity and cost increase
Solution Approach 1:
The patent merges the electrical connection function and heat dissipation function into a single integrated DBC substrate structure. By combining these functions and eliminating separate components like bonding wires and complex interconnection layers, the design achieves low parasitic inductance while maintaining simple overall structure and reduced manufacturing cost.
Solution Approach 2:
Instead of adding complex interconnection structures to reduce parasitic inductance, the patent inverts the approach by removing traditional high-inductance bonding wires and relying on direct metal-to-metal connections through the substrate. This inversion simplifies the structure while achieving the desired low parasitic inductance performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces packaging volume and weight, minimizes parasitic inductance, enhances switching speed, and enables double-sided heat dissipation, improving power density and reliability for high-power, high-frequency, and high-temperature environments.
Implementation Method 1
The bottom of the power bare die is connected to the direct bonding copper (DBC) substrate through solder
Implementation Method 2
A metal plating layer is provided on the inner wall of each blind via
Implementation Method 3
the heat generated by the power devices can only be dissipated through the bottom of the package
Data Source
AI summary
A package structure of an embedded power module includes a top insulation layer, a top metal pattern layer, a solder layer, a device layer, a bottom metal pattern layer and a bottom insulation layer sequentially arranged from top to bottom. The device layer includes at least two MOSFET bare dies and several metal connection blocks, and is filled with insulation filler to isolate the MOSFET bare dies and the metal connection blocks from each other. The drain electrodes of the bare dies are connected with the top metal pattern layer through the solder layer, and the source electrodes and the gate electrodes of the bare dies are electrically connected to the bottom metal pattern layer, respectively. The upper and lower surfaces of the metal connection blocks are electrically connected to the top metal pattern layer and the bottom metal pattern layer, respectively.