Embedded Power Electronics Assembly for Compact Thermal Management
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Power electronic devices, particularly those using silicon-carbide, generate significant heat and require improved cooling solutions while maintaining a compact package size, which existing technologies have not adequately addressed.
Innovation Solution
The integration of a power electronics device assembly into a circuit board with an S-cell structure, featuring a graphite layer and metal layer, and thermal vias, which enhances heat spreading and reduces thermal resistance by eliminating the need for a thermal grease layer between the circuit board and cold plate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If power electronic devices are made more compact to reduce package size, then device footprint is reduced, but heat flux increases and cooling requirements worsen
Solution Approach 1:
The patent merges the power electronic device assembly directly into the circuit board substrate, eliminating separate mounting structures and thermal grease layers. This integration reduces overall package volume while creating direct thermal pathways from the device to the cold plate through the substrate, thereby managing heat flux effectively in the compact configuration.
Solution Approach 2:
The patent employs a composite structure consisting of the circuit board substrate, metal layer, insulation layer, and cold plate. This multi-material assembly creates efficient thermal conduction pathways while maintaining electrical isolation, allowing compact packaging without compromising heat dissipation performance.
2Temperature
If conventional cooling structures are used with thermal grease layers, then thermal contact is achieved, but overall thermal resistance increases and package size increases
Solution Approach 1:
The patent extracts and eliminates the thermal grease layer from the thermal pathway by directly bonding the cold plate to the circuit board substrate. This removal of the intermediate thermal resistance layer reduces overall thermal resistance while simplifying the assembly structure and reducing package size.
Solution Approach 2:
The patent incorporates thermal vias and thermal pathways into the circuit board substrate during manufacturing, creating pre-established thermal conduction channels. This preliminary integration of thermal management features into the substrate eliminates the need for additional thermal interface materials and reduces assembly complexity.
3Area of stationary object
If silicon-carbide devices are used to reduce device footprint, then area is reduced, but heat generation increases requiring improved cooling
Solution Approach 1:
The patent transitions from planar heat dissipation to three-dimensional thermal management by embedding the device within the substrate and creating vertical thermal pathways through thermal vias to the cold plate. This dimensional change allows efficient heat removal from compact silicon-carbide devices without increasing footprint area.
Solution Approach 2:
The patent introduces the circuit board substrate and thermal via structure as intermediary elements between the silicon-carbide device and the cold plate. These intermediaries create efficient thermal conduction pathways that manage the high heat generation of compact devices while maintaining electrical isolation and mechanical support.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves thermal performance by promoting heat flux towards the cold plate, reducing overall thermal resistance and maintaining a compact package size, suitable for applications in electrified vehicles and other electronic systems.
Implementation Method 1
The S-cell includes an inner graphite layer, a metal layer encasing the inner graphite layer... promoting heat flux towards the cold plate
Implementation Method 2
a plurality of thermal vias thermally coupling the S-cell to the surface metal layer
Implementation Method 3
The surface metal layer of the circuit board assembly is bonded to a first surface of the cold plate
Data Source
AI summary
Power electronics assemblies having embedded power electronics devices are disclosed. In one embodiment, a power electronics assembly includes a circuit board assembly that includes a substrate that is electrically insulating and a power electronics device assembly embedded in the substrate. The power electronics device assembly includes an S-cell that includes an inner graphite layer, a metal layer encasing the inner graphite layer, and a first surface of the metal layer comprising a recess provided within the first surface. The power electronics device assembly further includes a power electronics device disposed within the recess of the first surface.