Embedded Random-Access Memory for NAND Boot Latency
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Solution Overview
Problem
NAND flash memory technology's reliability issues, such as varying block reliability over temperature and usage conditions, lead to increased latency and the need for additional error correction and management techniques, which can be inefficient and require external boot memory solutions, occupying valuable space.
Innovation Solution
Embedding a random-access non-volatile memory array, such as a memristor or NOR Flash memory, within the managed-NAND system package allows for fast and reliable read access for boot code and time-critical applications, enabling transparent access through existing memory pins and protocols, and excluding or including logic actions based on application requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If NAND flash memory is used for boot code storage, then high-density data storage is achieved, but read access latency increases significantly
Solution Approach 1:
The patent divides the memory system into two distinct segments: NAND flash memory blocks for high-density data storage and separate boot blocks with random-access non-volatile memory for fast code execution. This segmentation allows each part to optimize for its specific function, resolving the contradiction between storage density and access speed.
Solution Approach 2:
The patent introduces an intermediary structure (boot blocks with random-access memory) that mediates between the host processor and the main NAND flash storage. This intermediary provides fast access paths for critical boot operations while the main storage maintains high density, effectively bridging the performance gap.
2Reliability
If error correction and bad block management techniques are implemented, then reliability is improved, but system latency increases
Solution Approach 1:
The patent extracts the time-critical boot code execution function from the main NAND flash storage system and places it in dedicated boot blocks with random-access memory. This extraction removes the latency-inducing error correction and management overhead from the critical boot path, while reliability mechanisms remain in place for the main storage system.
3Speed
If external NOR flash memory is used for boot code, then fast random-access is achieved, but device space and complexity increase
Solution Approach 1:
The patent merges the boot code storage function with the existing NAND flash memory controller package by integrating random-access non-volatile memory directly into the controller. This consolidation provides fast boot access without requiring separate external NOR flash chips and their associated interconnections, reducing overall device complexity.
Solution Approach 2:
The memory controller is designed with multi-functionality, serving both as the interface to external NAND flash storage and as the controller for integrated random-access boot memory. This universal controller design eliminates the need for separate dedicated boot memory controllers and reduces system complexity.
Data Source
AI summary
Systems and methods embed a random-access non-volatile memory array in a managed-NAND system to execute the boot code or other time-sensitive applications. By embedding this random-access non-volatile memory in the managed-NAND system, either on the memory controller chip or as a separate chip within the managed-NAND system package, an application may be read with fast initial access time, alleviating the slow access time limitations of NAND Flash technology. Depending on the size of the application, the system may be configured to read the whole application content or only a time-critical portion from this embedded random-access non-volatile memory array.