P-Type Embedded Schottky Structure for Low Turn-On and High Withstand Voltage
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving low turn-on voltage and enhanced thermal stability due to issues with adhesion at Schottky and Ohmic junctions, limited electrode materials, and temperature-dependent barrier height changes.
Innovation Solution
A semiconductor device is designed with an n-type semiconductor layer and one or more p-type semiconductors embedded between the n-type layer and the electrode, where at least part of the p-type semiconductors protrude into the electrode, reducing contact resistance and electric field concentration, and enhancing withstand voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a Schottky electrode is arranged on a semiconductor substrate to increase reverse direction withstand voltage, then the reverse direction withstand voltage is improved, but the forward direction turn-on voltage increases
Solution Approach 1:
The patent applies local quality by creating different barrier heights at different locations: a first metal with lower barrier height is placed at the central portion to reduce turn-on voltage, while a second metal with higher barrier height is placed at the peripheral portion to increase withstand voltage. This spatial differentiation of material properties resolves the contradiction between low turn-on voltage and high withstand voltage.
Solution Approach 2:
The electrode structure is segmented into multiple functional regions: a central Schottky contact region with lower barrier height for efficient forward conduction, and peripheral Schottky contact regions with higher barrier height for enhanced reverse blocking. This segmentation allows each region to optimize its local function, resolving the performance trade-off.
2Reliability
If a combination of Schottky electrode and Ohmic electrode is used to improve thermal breakdown resistance, then the thermal breakdown resistance is improved, but adhesion problems occur at the interface
Solution Approach 1:
The patent employs composite material structure by combining different metal materials with appropriate barrier heights in specific configurations. The first metal (lower barrier height) and second metal (higher barrier height) are strategically positioned to create a composite electrode system that provides both low turn-on voltage and high withstand voltage, eliminating the need for separate Schottky and Ohmic electrodes and their associated adhesion problems.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device achieves improved semiconductor properties with reduced contact resistance, suppressed electric field concentration, and enhanced thermal stability and withstand voltage.
Implementation Method 1
a semiconductor device including a Schottky barrier electrode that is arranged on a semiconductor substrate
Implementation Method 2
suppressing electric field concentration
Data Source
AI summary
A semiconductor device with enhanced semiconductor characteristics that is useful for power devices. A semiconductor device, including: an n-type semiconductor layer; one or more p-type semiconductors; an electrode, the one or more p-type semiconductors that are provided between the n-type semiconductor layer and the electrode, and at least a part of the one or more p-type semiconductors is protruded in the electrode.