Embedded Semiconductor Package Fabrication Using Hard Carrier
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Solution Overview
Problem
Existing semiconductor package fabrication methods using thermal release tape face issues with positional deviation and warpage due to thermal expansion, leading to reduced product reliability and increased fabrication costs.
Innovation Solution
A semiconductor package and fabrication method that embeds semiconductor elements within a carrier substrate, eliminating the need for thermal release tape and molding processes, ensuring precise positioning and alignment of elements without thermal expansion-induced errors, and utilizing a hard carrier material to prevent warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If thermal release tape is used to attach semiconductor elements during wafer level packaging, then the elements can be easily attached and positioned, but the tape expands when heated causing positional deviation and warpage of the encapsulant
Solution Approach 1:
The patent changes the physical state and properties of the carrier from a flexible thermal release tape to a rigid substrate. This parameter change eliminates thermal expansion during heating, preventing positional deviation of semiconductor elements while maintaining ease of attachment through direct mounting on the rigid carrier surface
Solution Approach 2:
The patent replaces the reusable thermal release tape with a dedicated rigid carrier substrate that serves as a stable foundation throughout the packaging process. The carrier provides consistent positioning without the need for adhesive release mechanisms, eliminating the fundamental problem of thermal expansion
2Productivity
If a large size carrier is used to accommodate more semiconductor elements, then production capacity increases, but the positional error between elements and die areas increases
Solution Approach 1:
The patent divides the large carrier substrate into multiple defined die areas with precise geometric boundaries. Each die area is independently defined with reference to the carrier's rigid coordinate system, allowing precise positioning of semiconductor elements regardless of the overall carrier size. This segmentation maintains alignment accuracy while enabling high production capacity
Solution Approach 2:
The patent establishes a two-dimensional rigid coordinate system on the carrier substrate with precisely defined die areas. By using the carrier's inherent rigidity and defined geometry rather than relying on flexible tape properties, the system maintains precise positional relationships across the entire carrier surface, enabling accurate alignment even as carrier size increases
3Temperature
If thermal release tape is heated during the molding process, then the encapsulant can be cured, but the tape loses adhesive property causing elements to deviate from die areas
Solution Approach 1:
The patent extracts the semiconductor elements from the thermal release tape and mounts them directly on the rigid carrier substrate before molding. This removal of elements from the temperature-sensitive adhesive tape eliminates the problem of adhesive failure during heating, while the rigid carrier provides stable mechanical support throughout the curing process
Solution Approach 2:
The patent performs the element attachment to the carrier substrate before the molding and curing processes. By establishing the positional relationship between elements and die areas prior to heating, the system ensures that subsequent thermal processing does not cause positional deviation, as the rigid carrier maintains stable dimensions throughout curing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances product reliability and yield by preventing positional errors and warpage, while significantly reducing fabrication costs through the use of a hard carrier substrate that eliminates the need for heating and thermal release tape.
Implementation Method 1
the thermal release tape 11 is flexible and easily expands when being heated. Therefore, a positional deviation easily occurs to the semiconductor elements 12 due to expansion of the thermal release tape when being heated
Implementation Method 2
a second inactive surface, opposite to the second active surface, attached to the first inactive surface of the first semiconductor element
Data Source
AI summary
A semiconductor package is disclosed, which includes: a carrier having at least an opening; a plurality of conductive traces formed on the carrier and in the opening; a first semiconductor element disposed in the opening and electrically connected to the conductive traces; a second semiconductor element disposed on the first semiconductor element in the opening; and a redistribution layer structure formed on the carrier and the second semiconductor element for electrically connecting the conductive traces and the second semiconductor element. Since the semiconductor elements are embedded and therefore positioned in the opening of the carrier, the present invention eliminates the need to perform a molding process before forming the redistribution layer structure and prevents the semiconductor elements from displacement.