Embedded Semiconductor Package Through-Cavity Filling
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Solution Overview
Problem
Conventional embedded chip technology faces challenges with unfilled spaces between the chip and insulation compound due to the cured state of the insulation material, affecting bonding and positioning during lamination, leading to reduced product yield and increased layout area in compact electronic products.
Innovation Solution
A manufacturing method involving a substrate with a through cavity and patterned metal layers, where a semiconductor component is placed within the cavity, and a filling compound is dispensed above the groove defined by the component and cavity, allowing the compound to flow and fill the narrow groove upon heating, enhancing bonding and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional embedded chip technology uses cured insulation compound to embed the chip in the substrate, then the chip can be embedded in the substrate, but unfilled spaces remain between the chip and insulation compound, affecting bonding and positioning
Solution Approach 1:
The patent changes the physical state parameter of the filling compound from cured (rigid) to uncured (viscous) state during the embedding process. This allows the compound to flow and fill narrow grooves completely, eliminating unfilled spaces and ensuring proper bonding between the chip and substrate.
Solution Approach 2:
The patent applies preliminary action by dispensing the filling compound into the groove before the lamination process occurs. This ensures that the groove is pre-filled with the compound in a viscous state, allowing it to flow into all spaces before curing, thereby preventing voids and ensuring complete filling.
2Adaptability or versatility
If the layout area of the substrate surface is increased to accommodate embedded components, then more components can be integrated, but the electronic product size increases
Solution Approach 1:
The patent transitions from surface mounting (2D layout) to through-cavity embedding (3D integration). By placing components within the substrate thickness rather than on the surface, the design utilizes the third dimension (depth), allowing higher component integration without increasing the substrate's planar footprint.
3Area of stationary object
If the groove width between the chip and through cavity is reduced to save space, then the layout area decreases, but the filling compound cannot easily fill the narrow groove
Solution Approach 1:
The patent changes the viscosity parameter of the filling compound by controlling its temperature and cure state. By maintaining the compound in a viscous, uncured state during dispensing, it can flow into and completely fill narrow grooves (50-100 μm width) that would be inaccessible to thicker or cured materials, thereby achieving complete filling in compact designs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method ensures comprehensive filling of the groove, improving the bonding between the substrate and semiconductor component, thereby increasing product yield and reducing layout area requirements for compact electronic products.
Implementation Method 1
A heating process is performed for the filling compound to flow toward the tape carrier and comprehensively fill the groove
Data Source
AI summary
A manufacturing method of a package structure includes the following steps. A substrate including a core layer, first and second patterned metal layers is provided. The first and second patterned metal layers are respectively disposed on two opposite surfaces of the core layer. A through cavity penetrating the substrate is formed. The substrate is disposed on a tape carrier. A semiconductor component is disposed in the through cavity. An inner wall of the through cavity and a side surface of the semiconductor component define a groove. The filling compound is dispensed above the groove. A heating process is performed for the filling compound to flow toward the tape carrier and comprehensively fill the groove. First and second stacked layers are respectively laminated onto the first and second patterned metal layers and cover at least a part of the semiconductor component.