Embedded Sigma Fin Structure for Uniform FinFET Junctions
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor technologies face challenges in achieving a uniform source/drain junction profile in FinFETs due to non-uniformity caused by drive-in anneal of sigma-shaped source/drain structures, leading to inconsistency in gate length along semiconductor fins.
Innovation Solution
A semiconductor device and method involving a semiconductor fin with a gate structure and trenches that include sigma-shaped portions, where a semiconductor buffer region and doped semiconductor region are epitaxially grown to increase the volume of source/drain cavities, allowing for more stress-generating material deposition and enhancing channel stress, thus improving FinFET operating speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If sigma-shaped source/drain structure is embedded in source/drain regions to enhance channel strain, then channel strain is enhanced and transistor performance is improved, but drive-in anneal results in non-uniform junction profile along fin height direction causing inconsistency in gate length
Solution Approach 1:
The source/drain structure is segmented into multiple regions: the sigma-shaped source/drain structure embedded in the fin, and separate filled trenches positioned adjacent to the channel region. This segmentation allows the sigma structure to provide strain while the filled trenches provide uniform doping profiles, resolving the contradiction between strain enhancement and junction uniformity.
Solution Approach 2:
The filled trenches act as intermediary structures between the sigma-shaped source/drain structure and the channel region. These trenches are filled with doped semiconductor material that provides uniform doping during drive-in anneal, mediating the interaction between the sigma structure and channel to achieve both strain and uniformity.
2Stress or pressure
If sigma-shaped source/drain structure is positioned in close proximity to transistor channel region to maximize stress, then channel stress is maximized, but subsequent drive-in anneal causes non-uniform junction profile
Solution Approach 1:
The stress-providing function is segmented between the sigma-shaped source/drain structure (embedded in fin) and the filled trenches (adjacent to channel). The sigma structure provides localized stress at the channel interface, while the filled trenches provide distributed uniform doping, separating the stress maximization function from the uniformity function.
Solution Approach 2:
Different regions are assigned different qualities: the sigma-shaped structure embedded in the fin provides localized high stress at the channel interface, while the filled trenches provide uniform distributed doping. This local quality differentiation allows simultaneous achievement of maximum stress and uniform junction profile.
3Reliability
If drive-in anneal is performed on sigma-shaped source/drain structure to activate dopants, then dopant activation is achieved, but non-uniform junction profile is created along fin height direction
Solution Approach 1:
The dopant activation function is segmented between two structures: the sigma-shaped source/drain structure and the filled trenches. Both structures undergo drive-in anneal simultaneously, but the filled trenches provide a uniform doping profile that compensates for the non-uniformity from the sigma structure, achieving both activation and uniformity.
Solution Approach 2:
The filled trenches are designed to provide homogeneous doping distribution along the fin height direction. When combined with the sigma structure during drive-in anneal, this homogeneity compensates for the non-uniform doping from the sigma structure, resulting in uniform overall junction profile while maintaining dopant activation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in enhanced operating speed of FinFETs by increasing the volume of source/drain cavities and ensuring uniform source/drain junctions, resolving the issue of gate length variation and improving channel stress distribution.
Implementation Method 1
a semiconductor buffer region and doped semiconductor region are epitaxially grown to increase the volume of source/drain cavities
Data Source
AI summary
The present disclosure provides a semiconductor device including a semiconductor substrate, a semiconductor fin, a first filled trench and a second filled trench. The semiconductor fin is extending upwards along a first direction from the semiconductor substrate, comprising a channel region. The first filled trench and a second filled trench are formed in the semiconductor fin. The first filled trench, the channel region, and the second filled trench are sequentially arranged along a second direction. A width of the channel region along a third direction is different from a width of the first filled trench along the third direction. The first direction, the second direction, and the third direction are perpendicular to each other.