Embedded Silicon Bridge Layout for High-Density Multi-Die Packaging

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Solution Overview

Problem

Current microelectronic packages face challenges in achieving high-density interconnects between multiple dies due to limitations in organic substrates, which restrict data speed and I/O density, while fully silicon substrates are costly and prone to mechanical stress.

Innovation Solution

The implementation of an embedded multi-die interconnect bridge (EMIB) using localized silicon bridges within the organic package substrate, which provides high-density connections through various topologies such as linear multi-drop, ring, fly-by, and daisy-chained configurations, reducing the need for through-silicon vias and minimizing silicon area, thus balancing the advantages of both silicon and organic structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If organic package substrate is used, then cost is reduced and thermal/mechanical characteristics are preserved, but I/O density and data speed are limited

Engineering Contradiction:
ImproveI/O densityVSAvoidmanufacturing capability
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent introduces an embedded multi-die interconnect bridge (EMIB) as an intermediary component within the organic package substrate. This EMIB acts as a mediator that provides high-density interconnects between dies, enabling I/O densities that exceed the capabilities of the organic substrate alone, while the organic substrate continues to provide cost-effective packaging and thermal management.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If fully silicon substrate is used, then high-density interconnects are achieved, but cost increases and mechanical stress problems occur

Engineering Contradiction:
ImproveI/O densityVSAvoidmechanical stress
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by implementing silicon bridges only in specific localized regions where high-density interconnects are needed, rather than using a fully silicon substrate. This allows the package to achieve high I/O density in critical areas while maintaining the cost and mechanical advantages of organic substrate in non-critical areas.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent creates a composite structure combining organic substrate and silicon bridges. This hybrid approach leverages the advantages of both materials: the organic substrate provides cost-effective packaging and thermal characteristics, while the silicon bridges provide high-density interconnect capability where needed, avoiding the mechanical stress issues of a fully silicon construction.

Inventive Principle:
Principle #40Composite materials

3Volume of moving object

If more dies are packaged in single package, then device size is reduced, but interconnect density requirements increase

Engineering Contradiction:
Improvepackage sizeVSAvoidinterconnect density
Core Design Contradiction:
Volume of moving objectVSQuantity of substance

Solution Approach 1:

The patent utilizes three-dimensional stacking configurations with vertical interconnects through the EMIB structure. This dimensional transition from planar to vertical interconnection allows multiple dies to be packaged in a compact volume while maintaining high interconnect density through the embedded bridge structure that connects dies in the vertical dimension.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11742293B2Multiple die package using an embedded bridge connecting dies
Publication Date: 2023.08.29 INTEL CORP
  • US11742293B2 patent drawing
  • US11742293B2 patent drawing
  • US11742293B2 patent drawing

AI summary

A multiple die package is described that has an embedded bridge to connect the dies. One example is a microelectronic package that includes a package substrate, a silicon bridge embedded in the substrate, a first interconnect having a first plurality of contacts at a first location of the silicon bridge, a second interconnect having a second plurality of contacts at a second location of the silicon bridge, a third interconnect having a third plurality of contacts at a third location of the silicon bridge, and an electrically conductive line in the silicon bridge connecting a contact of the first interconnect, a contact of the second interconnect, and a contact of the third interconnect each to each other.