Embedded Silicon Oxide Isolation via Porous Silicon Anodization
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Solution Overview
Problem
Conventional semiconductor fabrication techniques, such as BCD processes, face challenges in creating complex insulation regions like STI and DTI, and the shapes of LOCOS areas are limited due to SiO2 growth characteristics, making it difficult to achieve unique oxide region structures necessary for effective local isolation in mixed signal ICs.
Innovation Solution
The technique involves forming embedded silicon oxide regions from porous silicon created in situ by anodizing a P-doped silicon region, allowing for controlled shape and profile of the oxide region, enabling unique structures like cup-shaped or partially embedded oxide regions that can isolate semiconductor devices effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If conventional thermal oxidation process is used to form SiO2 insulation regions, then insulation regions can be formed, but the shapes of LOCOS areas are limited due to SiO2 growth characteristics
Solution Approach 1:
The patent employs porous silicon as an intermediate structure that can be easily formed with desired shapes through anodization of P-doped silicon regions. The porous silicon is then converted to oxide, enabling complex 3D oxide structures including cup-shaped and partially embedded configurations that cannot be achieved through conventional thermal oxidation alone.
Solution Approach 2:
The patent changes the physical and chemical parameters of the silicon substrate by introducing P-doping before anodization. This parameter change enables the formation of porous silicon with controlled morphology, which subsequently transforms into oxide structures with shapes that overcome the limitations of direct thermal oxidation processes.
2Adaptability or versatility
If complex processes are used to form DTI and STI in a same wafer, then multiple insulation regions can be created, but the process complexity increases
Solution Approach 1:
The patent creates a universal insulation formation process based on porous silicon oxidation that can produce multiple types of insulation structures (DTI, STI, LOCOS-like regions) using a common methodology. This multi-functional approach replaces multiple specialized processes with a single versatile technique that can form different insulation regions throughout the wafer.
Solution Approach 2:
The patent divides the wafer into multiple P-doped silicon regions that are independently anodized to form separate porous silicon zones, which are then converted to distinct oxide insulation regions. This segmentation strategy enables formation of multiple insulation structures through repeated application of the same basic process steps in different locations.
3Reliability
If conventional insulation methods are used, then isolation regions can be formed, but parasitic N-P-N heterojunctions are not reduced
Solution Approach 1:
The patent applies local P-doping to specific silicon regions before anodization, creating porous silicon and subsequently oxide structures only where needed. This localized approach forms insulation regions with precise spatial control that can eliminate parasitic heterojunctions at critical interfaces while maintaining semiconductor functionality in other areas.
Solution Approach 2:
The patent introduces porous silicon as an intermediary structure between the silicon substrate and the final oxide insulation region. This intermediate porous silicon phase enables controlled oxidation that forms oxide structures with specific geometries capable of reducing parasitic heterojunctions, which cannot be achieved through direct thermal oxidation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the design and fabrication of mixed signal ICs by reducing parasitic N-P-N heterojunctions and achieving local dielectric isolation similar to silicon-on-insulator substrates, enhancing versatility and flexibility in integrating analog and digital devices within the same chip.
Implementation Method 1
The porous silicon is made in situ by anodizing a P doped silicon region
Implementation Method 2
forming embedded silicon oxide regions from porous silicon
Data Source
AI summary
A technique to make silicon oxide regions from porous silicon and related semiconductor structures is disclosed. The porous silicon is made in situ by anodizing P doped silicon regions. Thus, the shape and profile of the oxide regions may be controlled by controlling the shape and profile of the P doped silicon regions.