Embedded Solder Bump Chip for Compact Multi-Function Integration

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Solution Overview

Problem

Current chip-on-chip technologies face challenges in integrating diverse functions into a single, compact electronic apparatus, as existing methods do not effectively address the need for lighter and smaller electronic devices.

Innovation Solution

A chip manufacturing method involving a substrate with a conductive member, insulation, thermal-plastic material, and solder bump layers, allowing for the formation of conductive connections and jointed structures between chips, enabling efficient integration of different functions into a single package.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If chips of different functions are integrated into one package using existing SOP technology, then the electronic apparatus can be lighter and smaller, but the existing methods do not effectively address the integration challenges and connection reliability

Engineering Contradiction:
Improvepackage sizeVSAvoidconnection reliability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The chip structure is segmented into distinct functional layers: substrate, insulation layer, thermal-plastic material layer, conductive layer, and solder bump material layer. Each layer performs a specific function, allowing for modular integration of different chip functions while maintaining connection reliability through standardized interfacial structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention employs composite material structures combining substrate materials, insulation materials, thermal-plastic materials, conductive materials, and solder bump materials. This multi-material composite approach enables simultaneous achievement of mechanical strength, thermal management, electrical conductivity, and reliable inter-chip connections in a compact package.

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If conventional chip connection methods are used, then the manufacturing process is simpler, but the resulting structures cannot achieve effective integration of diverse functions in a compact form

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidintegration capability
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The conductive layer and solder bump material are pre-formed on the substrate during the manufacturing process, before chip assembly. This preliminary action enables subsequent easy alignment and bonding of chips to the substrate, achieving both manufacturing simplicity and effective integration of diverse functions through pre-configured connection structures.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The substrate structure with integrated conductive layers and solder bumps serves multiple functions: mechanical support, electrical connection, thermal management, and alignment reference. This universal structure enables integration of diverse chip functions while maintaining ease of manufacture through a standardized multi-layer platform.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the creation of compact, integrated chip structures that facilitate the integration of diverse functions, resulting in lighter and smaller electronic devices by forming conductive connections and jointed structures between chips using solder bumps and thermal-plastic materials.

Implementation Method 1

a thermal-plastic material layer is formed on the insulation layer

Methodology Applied
Scientific EffectThermal-plastic deformation: Plasticity

Implementation Method 2

a solder bump material is also formed in the first opening and the second opening

Methodology Applied
Scientific EffectMelting and solidification: Melting

Data Source

PatentUS7504726B2Chip and manufacturing method and application thereof
Publication Date: 2009.03.17 VIA TECH INC
  • US7504726B2 patent drawing
  • US7504726B2 patent drawing
  • US7504726B2 patent drawing

AI summary

The present invention provides a chip and its manufacturing methods and applications. Regarding the chip, there are several solder bumps on the backside of the chip. The difference of the invented chip from the convention chips is that the solder bumps are embedded in an insulting layer and a thermal-plastic material layer of the invented chip backside and separated by a conductive layer from the insulting layer and thermal-plastic material layer. Additionally, there are some end members in the insulting layer, and the end member corresponds to one solder bump. Through the present invention, chips with different functions can be integrated together, so that the needs for having portable communication devices lighter and smaller would be met.