Embedded Storage Relay Bus for Unified Disk Management

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Solution Overview

Problem

Conventional embedded storage devices require redesigning the operating systems for new storage devices, leading to delayed product launches and increased costs, as they need to manage compatibility and storage capacity changes, especially with the rapid advancements in NAND flash memory technology.

Innovation Solution

An embedded storage device with a relay bus that enables communication between multiple storage units, allowing them to be treated as a single disk by the computer system, simplifying the process by using a microprocessor to send commands through a master storage unit to either itself or a slave storage unit, and responding accordingly, thus combining small storage spaces into a larger one without increasing hardware complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple storage units communicate separately with the processor, then storage capacity is increased, but device complexity increases and compatibility management becomes difficult

Engineering Contradiction:
Improvestorage capacityVSAvoidcommunication management complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent merges multiple storage units into a single addressable space by implementing a relay bus that redirects commands from the processor to different storage units. The master storage unit acts as an intermediary that receives commands and forwards them to slave storage units, making all storage units appear as a single unified disk to the processor and eliminating the need for separate communication channels for each storage unit.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The master storage unit serves as an intermediary between the processor and slave storage units. It receives commands from the processor via the data bus and uses the relay bus to forward these commands to the appropriate slave storage unit. This intermediary approach simplifies the overall system architecture by centralizing command routing functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of time

If storage units are integrated into a single chip, then product development time is reduced, but storage capacity flexibility is limited

Engineering Contradiction:
Improveproduct development timeVSAvoidstorage capacity flexibility
Core Design Contradiction:
Loss of timeVSAdaptability or versatility

Solution Approach 1:

The patent segments the storage device into multiple independent storage units that can be individually addressed and controlled. Each storage unit maintains its own data pins and control pins, allowing them to be physically separate chips or modules while being logically unified. This segmentation enables flexible storage capacity configuration without requiring a complete redesign of the storage controller.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The relay bus implementation provides dynamic command routing capability, allowing the master storage unit to redirect commands to different slave storage units based on the current storage needs. This dynamic addressing mechanism enables the system to adapt storage capacity and configuration without requiring hardware changes, maintaining flexibility while benefiting from integrated architecture.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9830282B2Embedded storage device including a plurality of storage units coupled via relay bus
Publication Date: 2017.11.28 SK HYNIX INC
  • US9830282B2 patent drawing
  • US9830282B2 patent drawing
  • US9830282B2 patent drawing

AI summary

An embedded storage device for use with a computer device is provided. The embedded storage device includes a microprocessor, a master storage unit, a slave storage unit, and a relay bus. The microprocessor provides a command signal and creates data transmission link to the computer device. The master storage unit has at least a master data pin, and a master control pin. The master control pin receives a command signal from the microprocessor. The slave storage unit has at least a slave data pin. The relay bus is coupled to the master storage unit and the slave storage unit to transmit the command signal from the master storage unit to the slave storage unit.