CMOS Transistors with Embedded Stressor Channels

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Solution Overview

Problem

Existing CMOS field effect transistors with silicon-germanium alloy channels face challenges in applying the required longitudinal compressive stress for p-type MOSFETs and tensile stress for n-type MOSFETs, making it difficult to enhance carrier mobility effectively, especially as device scaling reduces the ability to apply strong stress.

Innovation Solution

The semiconductor structure incorporates epitaxial silicon-germanium alloy source and drain regions with varying germanium concentrations to apply compressive stress to p-type MOSFETs and tensile stress to n-type MOSFETs, enhancing hole and electron mobility respectively, by using embedded silicon and silicon-germanium alloy regions to generate the necessary stress along the channel.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If stress liners are used to apply stress to the channel, then carrier mobility is enhanced, but device scaling reduces the ability to apply strong stress

Engineering Contradiction:

Improvecarrier mobilityVSAvoidcritical dimension

Core Design Contradiction:

ReliabilityVSLength of moving object

Solution Approach 1:

The patent changes the material composition parameter by using silicon-germanium alloy with varying germanium concentrations in the source and drain regions. By adjusting the germanium concentration (e.g., 10-50% Ge), the lattice constant is modified to generate the required tensile or compressive stress in the channel, maintaining effective stress application despite device scaling.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structures where silicon-germanium alloy source and drain regions are combined with a silicon channel. This composite structure allows differential stress application: silicon-germanium provides compressive stress for PMOS while the silicon channel maintains tensile stress for NMOS, solving the scaling limitation.

Inventive Principle:

Principle #40Composite materials

2Reliability

If two different types of stress are applied to PMOSFET and NMOSFET, then carrier mobility is enhanced for both device types, but the device complexity increases

Engineering Contradiction:

Improvecarrier mobilityVSAvoidstress application mechanism

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by using different material compositions in source and drain regions for PMOS and NMOS devices. PMOS devices have silicon-germanium source/drain regions that provide compressive stress, while NMOS devices have silicon source/drain regions that provide tensile stress, allowing each device type to receive optimized stress locally.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The silicon-germanium alloy serves multiple functions: it acts as both the source/drain material and the stress-generating element. By varying the germanium concentration, the same material system can provide either compressive or tensile stress depending on the device type, reducing overall system complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the performance of both p-type and n-type MOSFETs by enhancing carrier mobility, leading to increased transconductance and on-current, while maintaining the integrity of the semiconductor structure.

Implementation Method 1

a longitudinal compressive stress is applied by embedded epitaxial silicon-germanium alloy source and drain regions comprising a silicon-germanium alloy having a higher concentration of germanium than the channel of the p-type MOSFET

Methodology Applied

Scientific EffectLattice mismatch stress:

Implementation Method 2

a longitudinal tensile stress is applied by embedded epitaxial silicon source and drain regions comprising silicon

Methodology Applied

Scientific EffectLattice mismatch stress:

Implementation Method 3

the applied stress and the resulting strain on the semiconductor structure within the channel affects the band gap structure (i.e., breaks the degeneracy of the band structure) and changes the effective mass of carriers

Methodology Applied

Scientific EffectStress-induced band structure modification:

Data Source

PatentUS8299453B2CMOS transistors with silicon germanium channel and dual embedded stressors

Publication Date: 2012.10.30 GLOBALFOUNDRIES US INC

AI summary

A p-type MOSFET of a CMOS structure has a silicon-germanium alloy channel to which a longitudinal compressive stress is applied by embedded epitaxial silicon-germanium alloy source and drain regions comprising a silicon-germanium alloy having a higher concentration of germanium than the channel of the p-type MOSFET. An n-type MOSFET of the CMOS structure has a silicon-germanium alloy channel to which a longitudinal tensile stress is applied by embedded epitaxial silicon source and drain regions comprising silicon. The silicon-germanium alloy channel in the p-type MOSFET provides enhanced hole mobility, while the silicon-germanium alloy channel in the n-type MOSFET provides enhanced electron mobility, thereby providing performance improvement to both the p-type MOSFET and the n-type MOSFET.