Embedded Sub-Package Semiconductor Packaging for Dense Die Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in efficiently manufacturing semiconductor packages due to their complex structure and limited manufacturing efficiency.
Innovation Solution
A semiconductor package is designed with a package substrate having semiconductor dice on its front side and an embedded sub-package on its back side. The embedded sub-package includes a sub-package substrate, an interconnection layer with vertical and horizontal interconnection portions, and additional semiconductor dice. This configuration allows for efficient electrical coupling between the semiconductor dice both within and between the sub-packages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If more electronic components are integrated together at higher density, then consumer needs for smaller and higher performance devices are met, but the package structure becomes more complicated and manufacturing efficiency is limited
Solution Approach 1:
The package structure is divided into multiple layers including a package substrate, an embedded sub-package, and multiple interconnection layers. This segmentation allows each layer to be manufactured and assembled separately, improving manufacturing efficiency while achieving high-density integration of electronic components across different substrates
Solution Approach 2:
An embedded sub-package is integrated within the overall package structure, where the sub-package containing additional semiconductor dice is embedded into the package substrate. This nesting approach enables higher component density without proportionally increasing package footprint or manufacturing complexity
2Adaptability or versatility
If multiple semiconductor dice are integrated in the package, then functionality and performance are improved, but the number of interconnection layers and substrates increases
Solution Approach 1:
The interconnection layers are designed to serve multiple functions: providing electrical connections between semiconductor dice, enabling signal routing, and facilitating thermal management. This multi-functionality reduces the need for separate dedicated structures, thereby reducing overall interconnection complexity while supporting multiple semiconductor dice with diverse functionalities
Solution Approach 2:
Interconnections are established not only within single substrates but also across multiple substrates through vertical interconnection structures. This three-dimensional interconnection approach allows multiple semiconductor dice to be integrated with reduced planar complexity, as connections are routed through the vertical dimension via interconnection layers between substrates
3Speed
If high integration of semiconductor dice is achieved, then electrical connection speed is improved, but manufacturing process complexity increases
Solution Approach 1:
The embedded sub-package is prepared and tested separately before being integrated into the final package structure. This preliminary assembly and testing of the sub-package allows for quality control and optimization to be performed on a smaller scale, reducing the complexity of the overall manufacturing process while enabling high-speed electrical connections between multiple semiconductor dice in the final integrated package
Data Source
AI summary
A semiconductor package is provided, comprising: a package substrate; a first plurality of semiconductor dice disposed on a front side of the package substrate; an embedded sub-package disposed on a back side of the package substrate, comprising: a sub-package substrate, wherein a front side of the sub-package substrate is attached to the back side of the package substrate; an interconnection layer attached to a back side of the sub-package substrate, comprising a second plurality of vertical interconnection portions and at least one horizontal interconnection portion; and a second plurality of semiconductor dice disposed on the back side of the sub-package substrate through the interconnection layer; and a first plurality of vertical interconnection portions disposed on the back side of the package substrate; and solder bumps attached to the first plurality of vertical interconnection portions.