Embedded Component Substrate with Bridge Chip Conductors

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing methods for manufacturing electronic components face challenges with densely arranged exposed contacts on chips due to limited precision in laser drilling, leading to short circuits and reduced reliability.

Innovation Solution

An embedded component substrate structure is developed with pre-made conductors on a carrier structure, where the conductors are exposed through a dielectric layer for connection, eliminating the need for laser perforations and improving reliability by avoiding short circuits and empty connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If laser drilling is used to create perforations for chip contacts, then connections between chips and circuits can be established, but the precision is limited causing unstable hole size and position which leads to short circuits or open connections

Engineering Contradiction:
Improveconnection reliabilityVSAvoidhole position and size precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by pre-forming conductive structures (vias and conductive lines) in the substrate before mounting the chip. This allows the conductor positions to be precisely defined in advance through standard semiconductor fabrication processes, eliminating the need for high-precision laser drilling after chip mounting. The conductors are prepared beforehand at their exact required positions, ensuring stable and reliable connections without the precision limitations of post-mounting laser drilling.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If more electronic components or processors are set up in a limited chip size to improve performance, then chip functionality is enhanced, but the exposed contacts become densely arranged making laser drilling increasingly difficult and error-prone

Engineering Contradiction:
Improvechip functionalityVSAvoidcontact arrangement precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies segmentation by separating the conductor formation process from the chip mounting process. The substrate is divided into regions with pre-formed conductors that correspond to future chip contact locations. This segmentation allows standard fabrication processes to create precise conductors in advance, while the chip can be mounted without requiring high-precision alignment for contact hole drilling, thus enabling dense contact arrangements without compromising precision.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If thermal reaming is used to enlarge laser holes, then hole quality is improved, but thermal effects cause instability in hole dimensions and position affecting adjacent perforations

Engineering Contradiction:
Improvehole qualityVSAvoidhole dimension and position stability
Core Design Contradiction:
Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

The patent extracts the hole formation step from the overall connection process by pre-forming conductive vias and lines through standard semiconductor fabrication techniques before chip mounting. This eliminates the need for laser drilling and thermal reaming operations entirely, removing the source of thermal instability. The conductors are created using controlled deposition and etching processes that do not involve thermal reaming, thus avoiding the dimensional and positional instability caused by thermal effects on adjacent structures.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11222838B2Embedded component substrate structure having bridge chip and method for manufacturing the same
Publication Date: 2022.01.11 UNIMICRON TECH CORP
  • US11222838B2 patent drawing
  • US11222838B2 patent drawing
  • US11222838B2 patent drawing

AI summary

An embedded component substrate structure and a method for manufacturing the same, with a carrier structure being formed with a groove on a top, and a chip structure with a plurality of conductors disposed in the groove. Dielectric layers are disposed on a top and a bottom of the carrier structure, and two opposite ends of multiple circuits in the carrier structure are exposed to the dielectric layers. Circuit build-up structures are disposed on the dielectric layers, and electrically connect to the circuits of the carrier structure.