Embedded Substrate Capacitor Layout for Compact High-Frequency Packaging

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Solution Overview

Problem

Conventional semiconductor package substrates face challenges in miniaturization, high-frequency applications, and high fabrication costs due to the need for additional space for passive devices on printed circuit boards, leading to increased assembly height and limited capacitance.

Innovation Solution

A semiconductor structure with embedded capacitors is developed, utilizing a substrate with conductive materials in holes acting as electrodes and high-k dielectric material as dielectric, integrated with redistribution layers, allowing for parallel connections and reduced fabrication costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If passive devices are mounted on the package, then the functionality is improved, but the total height of the SiP assembly increases

Engineering Contradiction:
ImprovefunctionalityVSAvoidtotal height
Core Design Contradiction:
Adaptability or versatilityVSLength of stationary object

Solution Approach 1:

The patent merges the passive devices with the substrate by embedding them during substrate fabrication. The passive devices are formed simultaneously with the substrate layers, integrating multiple functions into a single compact structure rather than mounting separate components, thereby reducing total assembly height while maintaining functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from vertical stacking (mounting passive devices on top of the package) to horizontal integration (embedding passive devices within the substrate plane). This dimensional reorganization allows passive devices to be incorporated without increasing the vertical height of the assembly.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If passive devices are mounted on the package, then the functionality is improved, but the size of the package assembly increases

Engineering Contradiction:
ImprovefunctionalityVSAvoidpackage size
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent combines the passive devices with the substrate structure itself, eliminating the need for separate mounting areas. The passive devices are formed as part of the substrate fabrication process, allowing them to occupy the same footprint area as the active circuitry rather than requiring additional external space.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The substrate serves multiple functions simultaneously: it provides mechanical support, electrical interconnection, and housing for passive devices. This multi-functionality eliminates the need for separate PCB areas dedicated to passive components, reducing the overall package footprint.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If conventional PCB mounting is used, then the passive devices can be easily installed, but additional area is required on the PCB

Engineering Contradiction:
Improveinstallation easeVSAvoidPCB area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The passive devices are fabricated in advance during the substrate manufacturing process itself, rather than being installed separately afterward. The substrate is built with embedded passive devices already in place, eliminating the need for subsequent mounting operations while saving PCB area.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The fabrication of passive devices and substrate is merged into a single integrated manufacturing process. Both are created simultaneously using the same fabrication steps, eliminating separate installation operations and reducing the area required on the final assembly.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The structure achieves a compact design with increased capacitance suitable for high-frequency applications while reducing fabrication costs through integrated capacitors within the substrate, enhancing electrical performance and reliability.

Implementation Method 1

The conductive material disposed in the first hole acts as a first electrode of a capacitor, the conductive material disposed in the second hole acts as a second electrode of the capacitor. The high-k dielectric material is disposed in the third hole and between the first electrode and the second electrode. The high-k dielectric material acts as a dielectric material of the capacitor.

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

The high-k dielectric material is disposed in the third hole and between the first electrode and the second electrode. The high-k dielectric material acts as a dielectric material of the capacitor. The dielectric constant of the high-k dielectric material is between about 10 and 20.

Methodology Applied
Scientific EffectDielectric: Dielectric

Data Source

PatentUS20250372547A1Semiconductor structure
Publication Date: 2025.12.04 MEDIATEK INC
  • US20250372547A1 patent drawing
  • US20250372547A1 patent drawing
  • US20250372547A1 patent drawing

AI summary

A semiconductor structure is provided. The semiconductor structure includes a substrate. The substrate includes a core, a conductive material, a high-k dielectric material, and a redistribution layer. The core has a first hole, a second hole, and a third hole passing through it. The conductive material disposed in the first hole acts as a first electrode of a capacitor, the conductive material disposed in the second hole acts as a second electrode of the capacitor. The high-k dielectric material is disposed in the third hole and acts as a dielectric material of the capacitor. The dielectric constant of the high-k dielectric material is higher that the dielectric constant of the core. The redistribution layer is disposed on the core and connected to at least one of the conductive material in the first hole and the conductive material in the second hole.