Embedded Substrate Conductors for Semiconductor Power Delivery
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Solution Overview
Problem
As integrated circuits scale down, they experience increased voltage drop and power consumption due to the scaling of power rails, which existing technologies have not effectively addressed.
Innovation Solution
The integration of embedded conductors below or at the same level as transistors, which serve as power rails or interconnects, reducing voltage drop and power consumption by providing additional routing resources and using materials like tungsten, ruthenium, and copper to withstand high-temperature fabrication stages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If power rails are scaled down with integrated circuits, then device size is reduced, but voltage drop and power consumption increase
Solution Approach 1:
The patent embeds conductors within the substrate thickness dimension rather than only in planar layers above the substrate. This vertical integration into the substrate's third dimension allows power delivery paths to be established without increasing the device's planar footprint, thereby reducing device size while maintaining effective power delivery capability
Solution Approach 2:
Embedded conductors act as intermediary power delivery paths between external power sources and transistors. These conductors are positioned within the substrate to provide dedicated power routing that separates power delivery from signal routing, reducing interference and improving power delivery efficiency without requiring larger device dimensions
2Volume of moving object
If power rails are scaled down with integrated circuits, then device size is reduced, but voltage drop increases
Solution Approach 1:
By utilizing the substrate thickness dimension for conductor embedding, the patent creates optimized power delivery paths that can be strategically positioned to minimize resistance and voltage drop. This dimensional approach allows for shorter and more direct power routing without expanding the device's planar dimensions
Solution Approach 2:
The patent employs high-conductivity materials such as copper and tungsten for embedded conductors, changing the electrical conductivity parameter of the power delivery paths. This material selection significantly reduces resistance and voltage drop compared to conventional interconnect materials, maintaining voltage stability in scaled-down devices
3Loss of energy
If embedded conductors are used to reduce voltage drop, then power consumption is reduced, but fabrication complexity increases
Solution Approach 1:
The embedded conductors are formed within the substrate before transistor fabrication begins. This preliminary action establishes the power delivery infrastructure early in the process, allowing subsequent transistor and interconnect formation to proceed without additional complexity. The conductors are pre-positioned to receive connections from overlying interconnect layers
Solution Approach 2:
The embedded conductors are nested within the substrate structure, with transistor regions and interconnect layers formed above them. This nesting arrangement integrates multiple functional elements (power delivery, signal routing, active devices) in a hierarchical manner, where each layer builds upon the previous one without requiring complex lateral integration
Data Source
AI summary
A structure includes a first substrate having a front side and a back side and a second substrate having a front side and a back side, wherein the back side of the second substrate is attached to the back side of the first substrate. The structure further includes a device layer over the front side of the second substrate; a first conductor going through a semiconductor layer in the second substrate; and a conductive connection that connects the first conductor to a conductive feature in the device layer.