Embedded Interconnect Substrate Cooling for High-Density Die Links

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High-density signal lines on embedded substrates lead to excessive heat accumulation, affecting signal transmission quality.

Innovation Solution

Incorporating a heat sink at the bottom of an interconnect substrate and a second heat sink above the dies, along with a stiffener ring and thermal conductive materials, to facilitate efficient heat dissipation from both the top and bottom of the dies, while maintaining high-density interconnectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high-density signal lines are arranged on the embedded substrate to achieve high-density interconnection, then the interconnection density is improved, but heat accumulation increases which deteriorates signal transmission quality

Engineering Contradiction:
Improveinterconnection densityVSAvoidheat accumulation
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The patent introduces heat dissipation holes that extend vertically through the embedded substrate, adding a third-dimensional heat dissipation pathway. This allows heat to be conducted from the signal lines through the substrate thickness to heat dissipation structures at the bottom surface, effectively managing thermal accumulation while maintaining high-density interconnection on the signal transmission surface.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces heat dissipation holes as intermediary structures that facilitate thermal energy transfer from the high-density signal lines through the embedded substrate to external heat dissipation components. These holes act as thermal conduits, enabling efficient heat removal without interfering with the electrical signal transmission function.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Temperature

If heat dissipation structures are added to reduce temperature, then thermal dissipation efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvethermal dissipation efficiencyVSAvoidstructure complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The embedded substrate serves multiple functions: it provides mechanical support for the dies, establishes electrical interconnections through signal lines, and conducts heat away from the signal lines through integrated heat dissipation holes. This multi-functionality reduces the need for separate dedicated heat dissipation components, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the heat dissipation function directly into the embedded substrate structure by forming heat dissipation holes within the substrate material itself. This integration combines the substrate's structural and thermal management functions into a single component, avoiding the need for separate heat sinks or thermal management assemblies.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances thermal dissipation efficiency, stabilizes die performance by reducing temperature, and improves signal transmission quality and bandwidth.

Implementation Method 1

a heat sink at the bottom of the interconnect substrate

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

thermal conductive materials, to facilitate efficient heat dissipation

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentEP4415041B1Electronic package, manufacturing method for electronic package and electronic device
Publication Date: 2025.11.05 CHENGDU HAIGUANG INTEGRATED CIRCUIT DESIGN CO LTD
  • EP4415041B1 patent drawingFigure 1~2
  • EP4415041B1 patent drawingFigure 3~4
  • EP4415041B1 patent drawingFigure 5~6

AI summary

Embodiments of the present disclosure provide an electronic packaging, a manufacturing method for an electronic packaging and an electronic apparatus. The electronic packaging includes a package substrate and an interconnect substrate, wherein a first surface of the package substrate is provided with a recess in which the interconnect substrate is embedded; and a bottom of the interconnect substrate is provided with a first heat sink; the first surface of the package substrate is provided with a first die and a second die; the first die and the second die are electrically connected through the interconnect substrate. Embodiments of the present disclosure are suitable for application scenarios that improve the quality of signal transmission between dies.