Embedded Substrate Package With Conductive Pillars for Dense SIP Routing
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Solution Overview
Problem
The challenge in semiconductor package manufacturing lies in reducing the size of system-in-package (SIP) structures that incorporate passive components, as existing technologies face difficulties in miniaturization due to the large size of passive components and complex, costly manufacturing processes that can damage trace layers and result in unstable adhesion and lower yields.
Innovation Solution
The semiconductor package structure incorporates an embedded trace layer within the substrate, connected by a conductive pillar and via, which simplifies manufacturing, reduces costs, and enhances adhesion and reliability by eliminating the need for redistribution layers and bump pads, while maintaining structural stability and increasing routing density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If passive components are incorporated into a single package (SIP technology), then integration is improved, but package size increases due to large component sizes
Solution Approach 1:
The patent embeds passive components (resistors, capacitors, inductors) directly within the substrate layers, nesting them inside the package structure rather than placing them as separate external components. This nesting approach allows multiple components to occupy the same spatial envelope, significantly reducing the overall package footprint while maintaining full functionality.
Solution Approach 2:
The patent transitions from a two-dimensional surface mounting approach to a three-dimensional embedded architecture. Components are positioned within multiple layers of the substrate (different z-dimensions) and connected through vertical vias, utilizing the third dimension to achieve higher density without increasing the package's planar footprint.
2Productivity
If complex manufacturing processes are used to achieve high-density interconnection, then routing density is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The manufacturing process is divided into discrete, standardized steps: forming conductive posts in first vias, depositing trace layers, forming conductive posts in second vias, and completing interconnections. This segmentation into modular operations simplifies process control and reduces manufacturing complexity compared to monolithic complex processes.
Solution Approach 2:
Conductive posts are formed in vias before the trace layers are deposited, preparing the interconnection structure in advance. This preliminary action simplifies subsequent manufacturing steps and reduces the complexity of coordinating multiple simultaneous operations.
3Ease of operation
If trace layers are exposed on the substrate surface for connection, then electrical connection is improved, but trace layers are vulnerable to damage
Solution Approach 1:
The trace layers are embedded within the substrate structure, nested between dielectric layers rather than exposed on the surface. This protective nesting shields the conductive traces from mechanical damage, contamination, and environmental degradation while maintaining electrical connectivity through the embedded architecture.
Solution Approach 2:
Dielectric layers are deposited over the trace layers before final package assembly, providing a protective cushioning layer that prevents damage to the embedded traces. This preemptive protection ensures trace layer integrity throughout subsequent manufacturing and operational phases.
4Reliability
If multiple manufacturing steps are used to form redistribution layers and bump pads, then connection reliability is improved, but manufacturing cost and complexity increase
Solution Approach 1:
The patent merges the functions of redistribution layers and bump pads into the embedded trace layer and conductive post structure. The trace layers serve both as signal distribution paths and as connection points, while the conductive posts provide both structural support and electrical connection, eliminating the need for separate redistribution and bumping processes.
Solution Approach 2:
The embedded trace layers and conductive posts serve multiple functions simultaneously: they provide electrical interconnection, mechanical support, and signal redistribution. This multi-functionality reduces the total number of manufacturing steps required while maintaining connection reliability through the robust embedded architecture.
Data Source
AI summary
A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first package and a second package. The first package includes a first substrate, an electronic component, a trace layer, and a first conductive structure. The first substrate has a first surface and a second surface opposite to the first surface. The electronic component is embedded in the first substrate. The trace layer has an uppermost conductive layer embedded in the first substrate and exposed from the first surface of the first substrate. The first conductive structure electrically connects the trace layer to the second surface of the first substrate. The second package is disposed on the first surface of the first substrate of the first package.