Embedded Package Substrate Lamination to Reduce Warpage

Solution Overview

Problem

The existing manufacturing process for substrates with embedded devices is costly and prone to warpage, leading to reduced yield and resource wastage due to the need for cavity creation and subsequent laminating processes.

Innovation Solution

A method involving the use of temporary carrier plates and dielectric layers to embed devices without creating cavities, reducing warpage by using copper foils and pillars, and employing seed layers and specific lamination techniques to connect circuit layers and pillars, while maintaining the integrity of the substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a cavity is manufactured in the substrate to embed the device, then the device can be embedded in the substrate, but the process flow becomes long and the cost increases

Engineering Contradiction:

Improvedevice embeddingVSAvoidprocess flow

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The device is embedded in the substrate before the substrate is fully formed. The method includes forming a first precursor substrate, embedding the device in the first precursor substrate, and then forming the second precursor substrate to cover the device. This preliminary embedding action eliminates the need for subsequent cavity formation, thereby simplifying the overall process flow while ensuring reliable device embedding.

Inventive Principle:

Principle #10Preliminary action

2Reliability

If a cavity is manufactured in the substrate to embed the device, then the device can be embedded in the substrate, but the manufacturing cost increases

Engineering Contradiction:

Improvedevice embeddingVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The device is embedded in the substrate before the substrate is fully formed. The method includes forming a first precursor substrate, embedding the device in the first precursor substrate, and then forming the second precursor substrate to cover the device. This preliminary embedding action eliminates the need for subsequent cavity formation, thereby simplifying the overall process flow while ensuring reliable device embedding.

Inventive Principle:

Principle #10Preliminary action

3Reliability

If dielectric material is laminated to fill the cavity and cover the device, then the device is covered and protected, but substrate warping occurs

Engineering Contradiction:

Improvedevice coverageVSAvoidsubstrate warpage

Core Design Contradiction:

ReliabilityVSStability of the object's composition

Solution Approach 1:

The device is embedded in the substrate before the substrate is fully formed. The method includes forming a first precursor substrate, embedding the device in the first precursor substrate, and then forming the second precursor substrate to cover the device. This preliminary embedding action eliminates the need for subsequent cavity formation, thereby simplifying the overall process flow while ensuring reliable device embedding.

Inventive Principle:

Principle #10Preliminary action

4Reliability

If dielectric material is laminated to fill the cavity and cover the device, then the device is covered and protected, but the yield decreases and resources are wasted

Engineering Contradiction:

Improvedevice coverageVSAvoidproduct yield

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The device is embedded in the substrate before the substrate is fully formed. The method includes forming a first precursor substrate, embedding the device in the first precursor substrate, and then forming the second precursor substrate to cover the device. This preliminary embedding action eliminates the need for subsequent cavity formation, thereby simplifying the overall process flow while ensuring reliable device embedding.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively reduces substrate warpage, improves yield, and decreases production costs by eliminating the need for cavity creation and minimizing stress-induced distortions during the curing process.

Implementation Method 1

manufacturing a third circuit layer and a target on an upper surface of a temporary carrier plate

Methodology Applied

Scientific EffectStress distribution:

Implementation Method 2

laminating a third dielectric layer on the third circuit layer and the target

Methodology Applied

Scientific EffectLamination: Lamination

Implementation Method 3

laminating a second copper foil on an upper surface of the second dielectric layer, and manufacturing a second circuit layer, a second copper pillar, and a third copper pillar through the second copper foil

Methodology Applied

Scientific EffectMetal deposition: Deposition (physical)

Implementation Method 4

manufacturing a second via hole and a third via hole, where the second via hole penetrates through the third dielectric layer and the second dielectric layer

Methodology Applied

Scientific EffectVia hole formation:

Implementation Method 5

manufacturing a second metal seed layer on the second copper foil, the second via hole and the third via hole

Methodology Applied

Scientific EffectSeed layer deposition: Deposition (physical)

Data Source

PatentUS20240047227A1Package substrate with embedded device, and manufacturing method therefor

Publication Date: 2024.02.08 ZHUHAI ACCESS SEMICONDUCTOR CO LTD

AI summary

A package substrate with an embedded device and a manufacturing method therefor are disclosed. The method includes: manufacturing a third circuit layer and a target on a temporary carrier plate, and laminating a third dielectric layer; placing a device to be embedded on the third dielectric layer which is then covered with a second dielectric layer; laminating a second copper foil and manufacturing a second circuit layer, a second copper pillar, and a third copper pillar; laminating a first dielectric layer and a first copper foil sequentially, and removing the temporary carrier plate; laminating a fourth dielectric layer on the third circuit layer; laminating a fourth copper foil on the fourth dielectric layer; and manufacturing a fourth circuit layer and a fourth copper pillar through the fourth copper foil, and manufacturing a first circuit layer and a first copper pillar through the first copper foil.