Embedded Switch Network Processor Shared Buffer
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Solution Overview
Problem
Existing network processors require large buffer sizes and have a sequential flow of packets, which is inefficient and inflexible, leading to increased latency and resource wastage due to the need for multiple passes through processing elements for varying system requirements.
Innovation Solution
The implementation of an embedded switch that replaces traditional buffers, allowing for shared buffer memory between modules and enabling flexible data paths based on packet attributes, allowing packets to be switched directly between interfaces and processing elements, reducing buffer size and enabling adaptable packet processing paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional separate buffers are used for each module, then buffer space is sufficient for all scenarios, but buffer size becomes excessively large and latency increases
Solution Approach 1:
The patent merges separate module-specific buffers into a single shared buffer resource that is commonly accessible by all processing modules. This consolidation eliminates redundant buffer allocations and reduces total buffer memory requirements while maintaining sufficient buffering capacity through dynamic sharing among modules.
Solution Approach 2:
The patent implements dynamic buffer allocation where the shared buffer can be flexibly assigned to different modules based on real-time processing needs. This dynamic approach allows the system to adapt buffer usage to varying traffic patterns and processing requirements, improving efficiency compared to static dedicated buffers.
2Productivity
If sequential packet flow through multiple buffers is used, then packet processing follows a fixed path, but latency increases and processing efficiency decreases
Solution Approach 1:
The patent replaces the fixed sequential packet flow with dynamic packet routing that can adapt paths based on processing requirements. Packets can be directly routed between interfaces or through specific processing modules as needed, eliminating unnecessary intermediate buffering steps and reducing latency.
Solution Approach 2:
The patent extracts the intermediate buffering step from the mandatory packet processing path. By removing the requirement for packets to pass through intermediate buffers between input and output, the system eliminates an unnecessary delay stage while maintaining processing flexibility through the shared buffer architecture.
3Ease of manufacture
If fixed processing paths are implemented, then system configuration is simple, but adaptability to different system requirements is reduced
Solution Approach 1:
The patent implements dynamic packet routing capabilities that allow the system to adapt processing paths based on different system requirements and traffic characteristics. The shared buffer architecture supports flexible routing decisions without requiring complex reconfiguration, maintaining ease of operation while improving adaptability.
Solution Approach 2:
The shared buffer serves multiple functions and can be accessed by different modules for various processing needs. This universal resource can support direct interface-to-interface packet transfer, processed packet routing through functional modules, and temporary packet storage, providing versatility without complicating the overall system architecture.
Data Source
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AI summary
A method of and a network processor unit (10) for processing of packets in a network, the network processor (10) comprising: communication interface (14) configured to receive and transmit packets; at least one processing means (16) for processing packets or parts thereof; an embedded switch (12) configured to switch packets between the communication interface (14) and the processing means (16); and wherein the embedded switch (12) is configured to analyze a received packet and to determine whether the packet should be dropped or not; if the packet should not be dropped, the switch is configured to store the received packet, to send a first part of the packet to the processing means (16) for processing thereof, to receive the processed first part of the packet from the processing means (16), and to transmit the processed first part of the packet.